Support NeoGAF

[midnightguy]

http://www.beyond3d.com/forum/viewtopic.php?t=22250

From Cool Chips forum in Japan

Code Name = DD2
Size:235mm2
Tape Out: end of 2004
Transitor: 250 million
New feature:CPU core can do 2 Order at the same time.


First gen Cell:
Code Name = DD1
Size:221mm2
Transistor: 234 million

Sorry, I am not good at English. But I wanted to write abut this info.

I guess PS3 CPU will be the 250 million transistor version ?


the newer CELL is of course not a true next-gen CELL, but really only a revision of the first

when the PS2 CPU was shown at ISSCC in early 1999, it was 10.5 million transistors and 250 MHz, then was revised to 13 or 13.5 million transistors and 300 MHz.

 

[quetz67]

Oh, they replaced the Transistors with Transitors...smart move

 

[TAJ]

>>>I guess PS3 CPU will be the 250 million transistor version ?<<<

I have a very hard time believing PS3 Cell will only have one PE.

 

[Izzy]

>>>I guess PS3 CPU will be the 250 million transistor version ?<<<

I have a very hard time believing PS3 Cell will only have one PE.

Why?

 

[gofreak]

>>>I guess PS3 CPU will be the 250 million transistor version ?<<<

I have a very hard time believing PS3 Cell will only have one PE.

"Only" one?

Crikey mate, look at the size of the thing. And look at the competition. There's no need for another one, and it'd be very expensive if not infeasible at the moment.

 

[TAJ]

The original PE prototype was on a much larger process than what they were aiming for with PS3, though.

 

[Izzy]

So, are you saying that you're expecting at least 2PE/16APU set-up for the PS3?

 

[gofreak]

The original PE prototype was on a much larger process than what they were aiming for with PS3, though.

We know they're aiming for 65nm, but we don't know for when. It's looking likely the first PS3 CPUs will be on 90nm, which was what these prototypes were manufactured on - and the process that the first PS3 CPUs are manufactured on will be the limiting factor. They'll likely hit 65nm a little later and shrink things down for subsequent PS3s.

 

[TAJ]

>>>So, are you saying that you're expecting at least 2PE/16APU set-up for the PS3?<<<

2 PEs on 65nm would be about the same size Emotion Engine was at PS2 launch, right? So, yes.

 

[Izzy]

Ah, I see. Would you say you'd be horribly disappointed if it was < 2 PEs?

 

[gofreak]

>>>So, are you saying that you're expecting at least 2PE/16APU set-up for the PS3?<<<

2 PEs on 65nm would be about the same size Emotion Engine was at PS2 launch, right? So, yes.

The chances of them getting to 65nm in the sufficient volumes before launch are slim. Consider also the cost - with 1 PE they'll still be comfortably ahead of the competition.

I'm not sure how anyone could be disappointed with 1PE with 6 or 8 SPEs, relative to the competition.

 

[automagnus]

New feature:CPU core can do 2 Order at the same time.

I assume this means hyper threading, so thats 8 chips x 2 threads per chip = 16 threads at a time.
wow, just wow
sony+1

 

[Elios83]

- 23

 

[gofreak]

I assume this means hyper threading, so thats 8 chips x 2 threads per chip = 16 threads at a time.
wow, just wow
sony+1

Not so sure if it means that There's some confusion over this. It likely just means the PowerPC processor is 2 issue or 2 way SMT. Which was originally the case with the ISSCC chip - which leads some to believe that it was the second revision that was shown at the ISSCC, not the first. Though then there'd still be some discrepancies with transitor amounts etc.

The SPEs are all two issue IIRC, but that doesn't mean two threads. It just means that if the instructions being fed to it allow for it, two instructions can be processed at the same time.

 

[Zeenbor]

Take a look at this: SCEA GDC CELL Presentation

As you can see, the PPE is dual issue and has 2 simultaneous hardware threads. The SPE's have dual issue, but do not have 2 HW threads.