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[jarrod]

Just in time for the holidays...

Matrix Unveils Two Breakthrough Technologies, Segmented Wordline And Hybrid Scaling

SANTA CLARA, Calif., May 10, 2005 - Matrix Semiconductor today announced the world’s smallest one-gigabit silicon memory at 31 square millimeters, the development of which was based on two technology breakthroughs that extend Matrix’s leadership role in three-dimensional semiconductor design: Hybrid Scaling and the Segmented Wordline architecture. Through the use of these two innovations, Matrix was able to double Matrix® 3-D Memory’s (3DM) bit capacity, using the same area of silicon, in less than one year. Matrix will continue to double density with each new version of its 3-D memory for years to come, providing high capacities at the lowest absolute silicon cost.

Unique to a 3-D integrated circuit, Hybrid Scaling is the combination of different process geometries within the layers of a 3-D circuit. This approach takes Matrix 3DM’s leading memory densities even further than predicted by Moore’s Law.

The first use of Hybrid Scaling by Matrix features base logic layers manufactured at 150-nanometer rules and subsequent memory layers at 130-nanometer rules. This allows Matrix to shorten its development time and achieve faster time-to-market by increasing the number of memory bits possible on top of a given logic array. Furthermore, Matrix is able to attain this using existing 180-nanometer toolsets, achieving state-of-the-art results with mature, lower-cost, fabrication processes. Future products from Matrix will continue to use this manufacturing approach, at progressively more advanced design rules, to achieve the most cost-effective memories possible.

The Segmented Wordline architecture - for which Matrix received its 100th patent - minimizes the effect of non-memory logic circuitry on silicon utilization. In traditional memory designs, the amount of silicon not used in the memory array lowers the overall manufacturing efficiency of the memory chip. Matrix’s three-dimensional approach alleviates this problem by building the memory array on top of the logic circuitry. The Segmented Wordline architecture results in a far more efficient use of silicon, reducing the die’s area by nearly 25%.

“Matrix is the industry’s leading innovator in the creation of three-dimensional integrated circuits,” said Dennis Segers, president and CEO of Matrix Semiconductor. “The development of Hybrid Scaling and the Segmented Wordline architecture form the foundation for this new family of products and enable Matrix’s roadmap to scale 3-D technology for years to come.”

The combination of Hybrid Scaling and the Segmented Wordline architecture presents an accelerated, economical, and sustainable scalability advantage, which Matrix will continue to apply to future versions of Matrix 3DM. In maintaining a strategy of using mature manufacturing processes, Matrix ensures it will continue to scale 3DM to progressively higher levels of integration which will exceed those of memory products made using state-of-the-art planar techniques.

By the end of 2005, Matrix will have applied these technologies across all of the memory capacities it currently offers (128-, 256-, and 512-megabit) as well as the new one-gigabit 3-D memory. Samples of these new products are available this quarter, and will be shipping in volume to customers in Q3 of 2005.

Matrix is the only company that builds integrated circuits in three dimensions producing cost-effective IC memory products by combining the supporting logic layers with multiple layers of memory on a single piece of silicon, making the most efficient use of a silicon wafer. Matrix 3DM is a permanent, programmable, non-volatile memory and the first product line developed by Matrix to be based on this technology. By using proven manufacturing techniques with the third dimension, Matrix derives lower cost and more components per wafer than any other comparable memory product on today’s market.


About Matrix Semiconductor
Matrix Semiconductor, Inc. is the creator and developer of the world’s first three-dimensional integrated circuits. Matrix’s first product, Matrix® 3-D Memory (3DM), is a low cost, high density line of permanent, programmable, non-volatile memory that is compatible with existing standards. Matrix 3-D Memory accelerates time-to-market for publishers of digital content and is targeted for use in portable consumer electronic devices.

...hey Sega, how about some Saturn ports for DS?

 

[Particle Physicist]

nice, but will it be compatible with the ds ?

 

[jarrod]

nice, but will it be compatible with the ds ?

DS uses 3DM for it's game cards. It's what the DS media design was based around.

 

[Particle Physicist]

DS uses 3DM for it's game cards. It's what the DS media design was based around.

well, thats pretty awesome. how large is the psp media in comparison?

 

[jarrod]

well, thats pretty awesome. how large is the psp media in comparison?

UMDs are 1.8GB dual layered (though no PSP games yet even fill half that, most being under 500MB).... quite a bit larger, but 1Gbit DS cards should be enough for most Saturn/PS1 games really.

 

[scarybore]

I'm right in saying 1Gbit is 128MBytes right? So double the size of the biggest N64 games (Conker and Resident Evil 2).

 

[jarrod]

I'm right in saying 1Gbit is 128MBytes right? So double the size of the biggest N64 games (Conker and Resident Evil 2).

Yep. Ports from the 32bit machines should be a snap!

 

[Particle Physicist]

Yep. Ports from the 32bit machines should be a snap!

i missed out on a bunch of saturn classics.. wouldnt mind having those ports..


now just drop the price nintendo, and the ds is mine.

 

[Panajev2001a]

1.8 GB = 14.4 Gbits .

 

[Chittagong]

Up to 128 MB games for DS? In the same ballpark, Pathway To Glory on Ngage is 64 MB (512 Mbit). Those two machines are cousins, I swear.

 

[Panajev2001a]

Yep. Ports from the 32bit machines should be a snap!

.

 

[scarybore]

Yep. Ports from the 32bit machines should be a snap!

Well, would it not be a bit naive to say it would be a snap for most games? Admitably RE2 on the N64 was a well done port and the version I most enjoyed, but it did suffer from lower quality music, sound effects, voices and indeed sounds being cut out altogether along with very pixallated FMV.

Out of interest, how good is FMV compression on the DS?

 

[Panajev2001a]

Well, would it not be a bit naive to say it would be a snap for most games? Admitably RE2 on the N64 was a well done port and the version I most enjoyed, but it did suffer from lower quality music, sound effects, voices and indeed sounds being cut out altogether along with very pixallated FMV.

You do have twice the storage space, but as Jarrod will have to conceed too you do not have the RSP helping decoding compressed video-data (N64's RE2 programmers admitted to use it quite a bit): it will all have to go software-only on the ARM9 core.

 

[wazoo]

DS carts were from the start promoted at 128MB (or 1Gb). So what is the point ??

cheaper carts ?? or more than 128MB by cart ??

 

[xsarien]

DS carts were from the start promoted at 128MB (or 1Gb). So what is the point ??

cheaper carts ?? or more than 128MB by cart ??

The only thing separating Matrix and chips larger than 1Gb is time.

 

[Deku]

Matrix was able to double Matrix® 3-D Memory’s (3DM) bit capacity, using the same area of silicon, in less than one year. Matrix will continue to double density with each new version of its 3-D memory for years to come, providing high capacities at the lowest absolute silicon cost.

That means we'll see 2 Gbit chips in the next year or so, on the same silicon size. So size isn't an issue.

As for costs, the real cost of ROM chips is the wafer/silicon itself. The larger the chip the more expensive it is. The Matrix technology basically gives you more storage capacity on the same size chip, and is achieved by stacking the wafers whereas a traditional ROM in the SNES, N64 era had to get bigger or the geometry to get tighter to yield more storage capacity. The matrix technology allows for chips to build up in 3-D so you can use the same surface area and tighter geometric configurations to yield higher capacity chips.

Very cool stuff. And as far as I understand it, DS carts are currently cheaper than UMDs to manufacture.

 

[wazoo]

so we'll have single chip carts bigger than UMD in 5 years (not counting out the possibility of multiple chips).

 

[GaimeGuy]

huh? Matrix already has 256MB chips out there....

How is this news? :|

 

[Vark]

It's not that the carts are 1Gbit (not news) its that they're fiting that onto less space.

ergo, a chip that used to hold 1Gbit can now fit 2Gbits in the same amount of space.

 

[xsarien]

huh? Matrix already has 256MB chips out there....

How is this news? :|

You may be confusing bits with bytes here. The PR is from just a month ago.

 

[mrklaw]

It's not that the carts are 1Gbit (not news) its that they're fiting that onto less space.

ergo, a chip that used to hold 1Gbit can now fit 2Gbits in the same amount of space.

Wow, so these guys can store up to 256MB on a teeny card, no bigger than a 2 GIGABYTE SD CARD? Amazing.

 

[GDGF]

This should make Nintendo very happy.

 

[UltraMarioMan]

Wow, so these guys can store up to 256MB on a teeny card, no bigger than a 2 GIGABYTE SD CARD? Amazing.

Without paying nearly as much as a 256MB SD card would cost you.

 

[JJConrad]

Through the use of these two innovations, Matrix was able to double Matrix® 3-D Memory’s (3DM) bit capacity, using the same area of silicon, in less than one year. Matrix will continue to double density with each new version of its 3-D memory for years to come, providing high capacities at the lowest absolute silicon cost.

Theoretically, by the start of the next next-gen, we could be seeing 8+ GB chips.

I miss cartridges.

 

[jarrod]

Very cool stuff. And as far as I understand it, DS carts are currently cheaper than UMDs to manufacture.

Manufacturing isn't cheaper, but overall Nintendo's charging publishers less in fees than Sony to make up the difference. So in the end, it still costs publishers more per UMD than per DS card.

 

[mrklaw]

Without paying nearly as much as a 256MB SD card would cost you.

Well, if you're going to let logic get in the way of a wildly cynical swipe.....

 

[Gahiggidy]

1.8 GB = 14.4 Gbits .

[u]Dimensions of UMD:[/u]

65 mm (W) x 64 mm (D) == 4,160 mm²

[i]Capacity...[/i] [b]14.4 Gbits[/b]


[u]Dimensions of Matrix Chip:[/u]

                            31 mm²

[i]Capacity...[/i] [b]1 Gbits[/b]


4,160 mm² / 31 mm² == 134.19

134.19 * 128 GBytes == 17.2 GB / 134 Gb

FACT: Nintendo DS media is 9½ times larger than the PSP's umd.¹

 

[MegaByte]

FACT: Nintendo DS media is 9½ times larger than the PSP's umd.¹

You should reword that to something along the lines of "Nintendo DS media holds 9.3 times the amount of data per area compared to the PSP's UMD" or "Nintendo DS media is 9.3 times smaller than the equivalent PSP UMD for the same amount of data," because the way you said it makes it sound like the opposite is true.

 

[GaimeGuy]

You may be confusing bits with bytes here. The PR is from just a month ago.

No, I'm not. I looked at Matrix's website back in january, and it said that they hade 256 Megabyte cards already out.

 

[hooo]

No, I'm not. I looked at Matrix's website back in january, and it said that they hade 256 Megabyte cards already out.

It might be that the gigabit chip is just one layer in what would be a multi layered chip. I'm pretty sure that Nintendo had gigabit DS cards at launch for publishers that wanted them. They were just multilayered and cost that much more.