3-D IC Engineering
Matrixs patented 3-D technology fundamentally changes the cost structure that governs IC design by providing an unprecedented, practical and high-volume approach to building multi-layered, three-dimensional integrated circuits. Using standard, proven semiconductor materials and process technology to build circuitry in multiple, active memory layers within a silicon die, Matrix achieves cost and density advantages that surpass existing technologies.
The memory chip industry is continuously in search of better solutions. For over forty years, industry innovation has largely focused on shrinking process geometries to reach higher densities, lower costs, and increased performance. Matrix has demonstrated a new approach.
In conventional ICs, all active circuitry rests on the silicon substrate, with additional layers of insulators and interconnects used only for wiring and mechanical strength. In contrast, Matrixs unique 3-D architecture deposits multiple layers of active memory elements on a standard silicon substrate (or silicon surface) so that active circuitry is no longer confined to the silicon base, but extends vertically as well. This novel approach enables Matrix to build chips with a much smaller die area for a given density than existing technologies, optimizing use of expensive silicon real estate and dramatically increasing manufacturing yields. This fundamental innovation enables Matrix to introduce the lowest-cost-per-bit memory in the market.
By using standard, proven semiconductor materials and process technology, Matrix leverages the vast knowledge and billions of dollars invested in the study of silicon and IC development. Using silicon reduces the complexity, costs, and risks associated with introducing new materials to development cycles and ensures high volume production with proven quality and reliability. Furthermore, Matrix is able to sustain its cost and density advantages with future generations of 3-D technology by scaling with advancements in industry.
Matrix has developed an extensive and growing Intellectual Property (IP) portfolio. The advent of 3-D IC design relaxes many present-day constraints, effectively accelerating Moores Law and pointing towards a fundamentally new way of thinking about the future of semiconductor design.