Why no Zen 3 in PS5 and XSX?

If it was a unified L3 cache a core would have access to 8MB cache rather than 4MB, so you'd have 8MB data width at roughly the same ~20ns as 4MB rather than ~90ns (i.e. you have 50% of your data in L3 and half in RAM).

And what evidence is there that the 2 Ghz test chip with no RT or any other features is the final ps5 APU silicon ?

Github is old, silicon gets revisions, basing everythng of old data is like basing everyhing off old dev kits.
 
And what evidence is there that the 2 Ghz test chip with no RT or any other features is the final ps5 APU silicon ?

Github is old, silicon gets revisions, basing everythng of old data is like basing everyhing off old dev kits.

I'll banbet you there will be no physical changes to the PS5 SoC compared to github/benchmark/driver leaks. This stuff doesn't change willy-nilly, laying out and validating a chip takes years.

Are they on the market currently?

Cezanne is AMD's 2021 APU, probably announcement at CES in January. Rembrandt will be in 2022.
 
Are they on the market currently?
Cezanne is floating as an engineering sample e.g. https://wccftech.com/amd-ryzen-5000...ed-features-even-faster-vega-gpu-than-renoir/



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AMD is already testing samples of the Cezanne desktop APU
Date: Sep 1st, 2020
 
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