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[mrklaw]

whats the deal with CELL in terms of protos etc? What kinds of configurations are they being produced in?

eg, are the first ones 1 PU just to make sure the tech works, and they can get yields OK? If so, thats the most likely to go in PS3 simply from a time point of view.

Or are they doing all sorts of configs already, like 4PU layouts?

I'm just wondering whether the multiple PU model is actually already doable, or just a roadmapped intent?

 

[Pug]

I'm sure Xbox did attract some people becuase it was the most powerful however Sony attratced a lot more being not the most powerful. I'm sure MS has done there MR regarding this (I work in PR/MR) the amount of people buying a product based on "power" is fairly limited. In terms of graphical ceiling, I agree with you I don't think any ceiling has been reached, but I do think that what the ATI GPU will do compared to the Nvidia GPU will be insignificant with reagrds to the ceiling. As for a little graphical trick being pounced upon I agree the marketing men will get there hands on it and make a great deal of it, but I suggest that the ATI GPU may well have as many tricks up its sleve that the Nvidia does. In terms of graphical grunt the machines to me seem to close to call, which I think is great for the next gen but its going to be bad on the olf wallet.

 

[Panajev2001a]

Dean C and others, AFAIK, are just speculating, also. Solid PS3 specs aren't being talked about yet, I don't think.

Hahahaha... *SCE ninja chockes Panajev till unconsciousness*




P.S.: take that as you will.

 

[gofreak]

Hahahaha... *SCE ninja chockes Panajev till unconsciousness*




P.S.: take that as you will.

:lol Pana, you are killing me...softly...

Would SCE Ninja's be hovering around DeanoC too, per chance?

 

[Pug]

You tease Panajev2001a. Again as you understand the technicalities much better than most of us regarding the XB2 setup and what may/not be the PS3 setup, can you see any major graphical advancement between the ATI GPU and Nividia GPU and what we will actually see on our normal TV sets, seeing as 90% of next gen games will not be viewed on a HD screen? Oh so is it 1-8 or 2-16 Pan?

 

[Ghost]

Looks like Xenon and PS3 are both gonna have heat distribution problems, if they use fans they'd better insulate the cases well. I dont want a jet engine in my living room.

 

[Panajev2001a]

For certain the ISSCC 2005 CELL CPU will be a 1 PU, 8 SPU's/APU's system, this can be said.

It is likely that this will be the final set-up for various reasons: yelds, performance being more than enough and probably enough to to keep the I/O bus connecting all the chips together, etc...

If on 90 nm technology (without a fan and probably without the final heat-sink solution btoh of which will improove for shipping systems IMHO) they can push a single PE with 8 SPU's/APU's at 4.6 GHz and heat it up to 85 degrees Celsius, do you really think that the jump to 65 nm willl yeld that much power saving to allow to quadruple the logic (more than that even) by adding three more PE's ? If they really wanted, they could, but would yields for such a massive 4.6 GHz CPU be high ? How much would the cooling solution cost for sucha CPU ?

Both GPUs in Xbox 2 and PlayStation 3 will be very very very very fast IMHO.

On one side ATI's GPU will be the basis for their real next-generation PC GPU, an evolution of the canned R400 project which will become the Xbox 2 GPU before evolving again into the R600 GPU. We are talking about their Windows Graphics Foundation (WGF) GPU, beyond their Shader Model 3 GPU which is the R520 (an evolution of the R420, which was an evolution of the R300).

This GPU will also bring interesting techniques forward as it should be able to read and write in a locked portion of the CPU's L2 cache as well as being able to share the computational load across all of the Shader ALUs in the GPU and also share it between itself and the CPU: the CPU should be able to perform Vertex Shading work, but all the Shader ALUs in the GPU will be able to be used for either Vertex Shading or Pixel Shading as ATI believes that it is the time for the smae Shader ALU to be used for both tasks since WGF unifies the instruction set of both Vertex Shaders and Pixel Shaders. according to what we hear fetching textures for Vertex or Pixel programs should be fast (this is what developers are saying too and it would make sense thinking about Unified Shading Units) which was not true yet with NV40 (Vertex Texturing was not as fast as some people hoped it would be). What does that make easier ? Displacement mapping, animation, PS -> VS feed-back, etc...

How efficient will this choice be at its first real implementation in ATI's family of GPU's ? We will see in the next few years.

nVIDIA will move to an Unified Shader Model as specified by WGF with their NV50 GPU (the GPU that will be customized to be PlayStation 3's GPU), but they do not want to move to Unified Shader ALUs as they believe that an optimized VS ALU or an optimized PS ALU will be better than a Unified Shader ALU at doing their respective job.

nVIDIA with NV40 already started with a GPU with more features than R420 (a very usable Shader Model 3.0 GPU) and that was certainly fast. NV30 was their real mistake, a GPU which introduced DirectX 9 on their product lines, but was relatively slow at it and had to sacrifice precision often to gain back the speed (FX10 or FP16 calculations used instead of FP32). Shader Model 3.0 on NV40 runs quite well and with full FP32 precision (thsi mode does not have the performance problems that plagued the NV30 GPU). nVIDIA has a revision of the NV4x family ready, it will come handy to fight against the R520 while the NV50 will be on the market to try to steal the thunder from the R600 as NV50 is their real next-generation GPU architecture and should be the next leap they make in performance and features.

IMHO, NV50 will be out before R600 hits and this should result in R600 (thsu the Xbox 2 GPU in a way) being probably a bit more forward looking and having the advantage of new features introduced, being a more radical change from their previous generation GPU than the change we will see going from NV40 to NV50: sure, new features will be added and performance will improove a lot, but in a way architecturally the NV40 and the NV50 will share a more similar set-up compared to R520 and R600 (for starters, you will have separate Vertex Shading ALUs Shading ALUs on NV50 and each ALU complex will still have its own set of resources).

In a way Xbox 2 GPU might end up being more flexible over-all: some more features, ability to balance Vertex Shading work and Pixel Shading work as the programmer is somehwat in control of how many ALUs are used for Vertex Shading work or Pixel Shading work (right now, this is not possible as you have a fixed amount of Vertex Sahder ALUs and Pixel Shader ALUs in the particular GPU we observe). PlayStation 3's GPU might end up being faster although not exactly as flexible internally as the Xbox 2's GPU. Many things are unknown still, thhe way CPU and GPU collaborate in PlayStation 3 has still to be disclosed, we do not know if the PlayStataion 3 GPU will include Vertex shaders or if it will give all the Vertex Shading work to the CPU, etc... so it is too difficult to predict much. We do not even know for certain how many months will there be between the release of Xbox 2 and Playstation 3 so it is not even possible to tell how much would that affect the technological difference between the two consoles as we do no fully know the point they start from according to a hypotetical short delay between the launch of the two consoles.

If PlayStation 3's GPU does off-load Vertex Shading to the CPU and includes very fast Pixel Shading capabilities along with a nice chunk of e-DRAM to maximize fill-rate efficiency that might mean that in titles optimized for PlayStation 3and then ported to Xbox 2 that some of the flexibility of Xbox 2's GPU would not be used as we would have to use most if not all of our Unified Shader ALU's for Pixel Shading work unless the CPU cannot handle all the Vertex Shading work by itself, but we do not know in which scenarios this would happen.

We will know more about the CPU of both systems in the next few months, or so I hope, but the GPU's specs and performance figures won't be known for a while longer I am afraid.

 

[gofreak]

Thanks for your thoughts Pana, as always, very interesting..

I would agree mostly with what you're saying about the GPUs, although we do know a little about the differences in terms of their timelines etc. ATi has apparently wrapped up work on the Xenon GPU, whereas NVidia don't expect work on the PS3 chip to be finished for another 6 months or so, which would yield a time gap of between 6 and 9 months. I would agree, though, that this probably wouldn't allow for the introduction of vastly new functionality more than performance differences i.e. the time will probably allow NVidia to make their chip faster rather than more advanced functionally.

 

[ThirdEye]

XBox2's triple core CPU is said to push ~84 Gflops. I cant remember if that was the exact amount but it was 80~90 Gflops. Xbox2 is likely to have one of these sub-100 Gflop triple core CPUs but the newest revealed patents indicate that there could be more CPUs. it is flexable. it's not out of the realm of possibility that MS could have 2 triple core CPUs but thats still under 200 Gflops (80~90 Gflops * 2)

a single Cell Processor Element (1 CPU core plus 8 APUs) is said to push 256 Gflops

the PS3 CPU could be made from 1 to 8 of these 256 Gflop Cell Processor Elements. lets say Sony goes for a 2-PE CPU. thats 512 Gflops. that would outperform even 2 triple core CPUs in Xbox2 (160~180 Gflops) and totally blow away a single triple core Xbox2 CPU (80-90 Gflops).


4.6~4.8 GHz vs 3.5 GHz does in no way indicate what PS3 will be like vs Xbox2, going by clockspeed numbers.

clockspeed matters, yes, but also it's about how much performance you have per clock.

Those flops numbers depend on clockspeeds. FWIW, Cell PE's 256Gflops comes from an APU having 32Gflops described in the prefered embodiment in the Cell patent, and it well matches the speculation of the 1TFlops performance at 4GHz. Thus, before 4.6GHz was known as a real figure, it was thought that 4GHz was the target clock speed of the Cell and as a holy grail since the PowerPC in Mac G5 was stuck at far lower speed. The number 4.6 means they'd overcome it, when 4GHz is well enough.

Now with the 4.6GHz clock speed in the 90nm process, only remaining concern is how many PEs they can put into the 65nm PS3's CPU with the 2x larger die area. If the PS3's CPU has 4 PEs and is clocked at 4.6GHz, it has the 1.15TFLOPS theoretical performance as 1 PE has 294.4GFLOPS.

 

[doncale]

Those flops numbers depend on clockspeeds. FWIW, Cell PE's 256Gflops comes from an APU having 32Gflops described in the prefered embodiment in the Cell patent, and it well matches the speculation of the 1TFlops performance at 4GHz. Thus, before 4.6GHz was known as a real figure, it was thought that 4GHz was the target clock speed of the Cell and as a holy grail since the PowerPC in Mac G5 was stuck at far lower speed. The number 4.6 means they'd overcome it, when 4GHz is well enough.

Now with the 4.6GHz clock speed in the 90nm process, only remaining concern is how many PEs they can put into the 65nm PS3's CPU with the 2x larger die area. If the PS3's CPU has 4 PEs and is clocked at 4.6GHz, it has the 1.15TFLOPS theoretical performance as 1 PE has 294.4GFLOPS.

yes I forgot about the difference between the 4 GHz and 4.6 GHz APUs. a 4.6 GHz APU should provide 36.8 Gflops. therefore a two Processor Element CPU with 16 APUs should provide 588.8 Gflops. that is 94.9x the Emotion Engine's performance. a four PE CPU would then provide 1177.6 Gflops which *should* be the same as that 1.15 Tflops you mentioned. 1 TFLOP is 1024 Gflops. I cant do more math at this hour >_<

 

[RonaldoSan]

What do developers need such powerhouses for? Making real-time simulation games? I doubt the dev. tools will be much easier to work with anyhow. Who needs modeling now? Lease a car, scan it in 3d, put it in game.

 

[doncale]

For certain the ISSCC 2005 CELL CPU will be a 1 PU, 8 SPU's/APU's system, this can be said.

It is likely that this will be the final set-up for various reasons: yelds, performance being more than enough and probably enough to to keep the I/O bus connecting all the chips together, etc...

If on 90 nm technology (without a fan and probably without the final heat-sink solution btoh of which will improove for shipping systems IMHO) they can push a single PE with 8 SPU's/APU's at 4.6 GHz and heat it up to 85 degrees Celsius, do you really think that the jump to 65 nm willl yeld that much power saving to allow to quadruple the logic (more than that even) by adding three more PE's ? If they really wanted, they could, but would yields for such a massive 4.6 GHz CPU be high ? How much would the cooling solution cost for sucha CPU ?

Both GPUs in Xbox 2 and PlayStation 3 will be very very very very fast IMHO.

On one side ATI's GPU will be the basis for their real next-generation PC GPU, an evolution of the canned R400 project which will become the Xbox 2 GPU before evolving again into the R600 GPU. We are talking about their Windows Graphics Foundation (WGF) GPU, beyond their Shader Model 3 GPU which is the R520 (an evolution of the R420, which was an evolution of the R300).

This GPU will also bring interesting techniques forward as it should be able to read and write in a locked portion of the CPU's L2 cache as well as being able to share the computational load across all of the Shader ALUs in the GPU and also share it between itself and the CPU: the CPU should be able to perform Vertex Shading work, but all the Shader ALUs in the GPU will be able to be used for either Vertex Shading or Pixel Shading as ATI believes that it is the time for the smae Shader ALU to be used for both tasks since WGF unifies the instruction set of both Vertex Shaders and Pixel Shaders. according to what we hear fetching textures for Vertex or Pixel programs should be fast (this is what developers are saying too and it would make sense thinking about Unified Shading Units) which was not true yet with NV40 (Vertex Texturing was not as fast as some people hoped it would be). What does that make easier ? Displacement mapping, animation, PS -> VS feed-back, etc...

How efficient will this choice be at its first real implementation in ATI's family of GPU's ? We will see in the next few years.

nVIDIA will move to an Unified Shader Model as specified by WGF with their NV50 GPU (the GPU that will be customized to be PlayStation 3's GPU), but they do not want to move to Unified Shader ALUs as they believe that an optimized VS ALU or an optimized PS ALU will be better than a Unified Shader ALU at doing their respective job.

nVIDIA with NV40 already started with a GPU with more features than R420 (a very usable Shader Model 3.0 GPU) and that was certainly fast. NV30 was their real mistake, a GPU which introduced DirectX 9 on their product lines, but was relatively slow at it and had to sacrifice precision often to gain back the speed (FX10 or FP16 calculations used instead of FP32). Shader Model 3.0 on NV40 runs quite well and with full FP32 precision (thsi mode does not have the performance problems that plagued the NV30 GPU). nVIDIA has a revision of the NV4x family ready, it will come handy to fight against the R520 while the NV50 will be on the market to try to steal the thunder from the R600 as NV50 is their real next-generation GPU architecture and should be the next leap they make in performance and features.

IMHO, NV50 will be out before R600 hits and this should result in R600 (thsu the Xbox 2 GPU in a way) being probably a bit more forward looking and having the advantage of new features introduced, being a more radical change from their previous generation GPU than the change we will see going from NV40 to NV50: sure, new features will be added and performance will improove a lot, but in a way architecturally the NV40 and the NV50 will share a more similar set-up compared to R520 and R600 (for starters, you will have separate Vertex Shading ALUs Shading ALUs on NV50 and each ALU complex will still have its own set of resources).

In a way Xbox 2 GPU might end up being more flexible over-all: some more features, ability to balance Vertex Shading work and Pixel Shading work as the programmer is somehwat in control of how many ALUs are used for Vertex Shading work or Pixel Shading work (right now, this is not possible as you have a fixed amount of Vertex Sahder ALUs and Pixel Shader ALUs in the particular GPU we observe). PlayStation 3's GPU might end up being faster although not exactly as flexible internally as the Xbox 2's GPU. Many things are unknown still, thhe way CPU and GPU collaborate in PlayStation 3 has still to be disclosed, we do not know if the PlayStataion 3 GPU will include Vertex shaders or if it will give all the Vertex Shading work to the CPU, etc... so it is too difficult to predict much. We do not even know for certain how many months will there be between the release of Xbox 2 and Playstation 3 so it is not even possible to tell how much would that affect the technological difference between the two consoles as we do no fully know the point they start from according to a hypotetical short delay between the launch of the two consoles.

If PlayStation 3's GPU does off-load Vertex Shading to the CPU and includes very fast Pixel Shading capabilities along with a nice chunk of e-DRAM to maximize fill-rate efficiency that might mean that in titles optimized for PlayStation 3and then ported to Xbox 2 that some of the flexibility of Xbox 2's GPU would not be used as we would have to use most if not all of our Unified Shader ALU's for Pixel Shading work unless the CPU cannot handle all the Vertex Shading work by itself, but we do not know in which scenarios this would happen.

We will know more about the CPU of both systems in the next few months, or so I hope, but the GPU's specs and performance figures won't be known for a while longer I am afraid.

where to begin. Panajev I think it's great that you remember most everything correctly from what is known. all the facts you seemed to have remembered and I don't have to go saying "no, it's going to be this and like that". way to go man.

it'll be interesting to see how much Nvidia's NV50 derived GPU solultion for PS3 differs from ATI's R400 derived VPU solution for Xenon.

i'm glad you didn't assume NV50 was canceled like rumors suggest. they were just rumors.


I am troubled by the current thinking that PS3 will only have one PE. but I suppose it wouldn't matter if the Nvidia GPU couldn't keep up.

 

[doncale]

Those flops numbers depend on clockspeeds. FWIW, Cell PE's 256Gflops comes from an APU having 32Gflops described in the prefered embodiment in the Cell patent, and it well matches the speculation of the 1TFlops performance at 4GHz. Thus, before 4.6GHz was known as a real figure, it was thought that 4GHz was the target clock speed of the Cell and as a holy grail since the PowerPC in Mac G5 was stuck at far lower speed. The number 4.6 means they'd overcome it, when 4GHz is well enough.

Now with the 4.6GHz clock speed in the 90nm process, only remaining concern is how many PEs they can put into the 65nm PS3's CPU with the 2x larger die area. If the PS3's CPU has 4 PEs and is clocked at 4.6GHz, it has the 1.15TFLOPS theoretical performance as 1 PE has 294.4GFLOPS.

and yes flops figures depend on clockspeeds, but even moreso, they depend on architecture right?

a 4.6 GHz Broadband Engine made from 4 Processor Elements would be ALOT faster than a 3.5 GHz Xenon CPU made from 3 PPC/POWER cores. a 3.5 GHz Xenon CPU is not 76% the power of a 4.6 GHz Broadband Engine.

architecture is #1 determining factor in performance
clockspeed is #2 determining factor in performance

from my limited understanding

 

[NotMSRP]

performance is determined by three factors: instruction count, clock cycles per instruction, and clock frequency

and if you want to emphasize on either throughput performance or latency performance

 

[Pug]

Third eye read Panajev2001a post he knows a lot more than many.

"For certain the ISSCC 2005 CELL CPU will be a 1 PU, 8 SPU's/APUs system, this can be said.

It is likely that this will be the final set-up for various reasons: yelds, performance being more than enough and probably enough to to keep the I/O bus connecting all the chips together, etc..."

The PS3 is not going to have a 4 PU 32 setup, it doesn't need it. As Pani said one PU 8APU is more than likely what we will se in the PS3 for the reasons he pointed out.

 

[marsomega]

I wasn't talking about someone with multiple cell-devices helping others with none (although that is possible, I guess). I was just talking about a network of PS3s helping each other in online games, where for example, one person's view may require more processing than anothers (one example talked about was a game whereby you could adopt a birds-eye "commander" view or a first person "solider" view in a MMO battle game - different PS3s will have different processing requirements depending on your view, and those that are less stressed may be in a position to help the others with more taxing rendering demands). I'm not necessarily saying this is feasible, now, but that it is something Sony are looking into, so such applications are being considered for some point in the future. I'll try and dig up a link to the patent on this if you want more detail, but after reading it, it was the first time I thought "yes, this could possibly work" with regards to Cell's distributed processing capability.

I wasn't picking on you. And it really doesn't matter which case you are talking about, it is all the same. The questions were general and the issues no matter what the finalized specs of PS3 become are there. How does another PS3 help another when one has a view that has less processing require ments then another at any given moment? You don't even have to be exact, the question could be asnwered in general. However, it would have to be more then just "PS3 A has extra processing power to give then PS3 B so it will help PS3 B which will also be helped by PS3C". And exactly how can someone so easily say

one person's view may require more processing than anothers (one example talked about was a game whereby you could adopt a birds-eye "commander" view or a first person "solider" view in a MMO battle game - different PS3s will have different processing requirements depending on your view, and those that are less stressed may be in a position to help the others with more taxing rendering demands)

The way these or even current high end GPU's have their way with graphics processing, how can you think node based multiprocessing over the net will compare? I don't mean to pick on you I'm just using your statement because it's convenient, it's there. But I'm sure you read everywhere similar statements mindlessly posted and carelessly explain. (Has any of them even sat down to think about this.) I mean when I first read this I couldn't casually say it won't be feasible because of the net, I just thought how could anyone just say that without thinking of the huge differences in graphics trafficking versus net trafficking.

The questions I presented earlier were for any computing platform based on the net in general really, it just happens that your post was a reminder. I for one wouldn't even consider it a feature, rather PR hot air. For example, they listed "being able to run multiple OS's at one time." Right there I understood it, at least this is my current thinking. Running multiple OS's at the same time is not some new "mega wow" feature. It's always been there and done before on many computing clusters. It is one of the best ways to learn, tweak, and tinker when studying the science of operating systems at the grad level. It is nothing knew, anything with similar computing characteristics such as cell can do it. Take my word for it for now. The way Sony PR throws it out, makes me believe they're just listing random characteristic out there of this type of computing and hyping it up. I imagine the statement of "PS3's helping other PS3's to render such and such" is just an over blown hyped characteristic of computing cluster.

Again, I don't know how blind someone could be to make such a claim like this with graphic computing. I have my doubts and thus I made a serious post about it. (Least you took some time to respond. Doubt anyone read it through. It deals with the boring aspect of computing in Cell and computing in general. )

Much of what Pana mention is pretty much out there if you take the time and read. Also you have to sort some things here and there. And I also have my curiosities in this area. For example, I know NVIDIA is going to take it up the rear and fully implement unified shaders. However, I'm curious as to why they rather have two separate optimized parts to do all the work in their hardware. They did their work in trying to sway in their favor which makes me curious as to how optimized and what these shaders can do to be more then enough to make NVIDIA think they can compete with/have an edge/or blow out ATI's high end. It would have been a very interesting battle and it certainly looks like PS3 will be our only glimpse of this battle that was to come. (Least as close as we can get as it will be difficult to compare them direct because of their respective platforms.) Also makes me just as curious about ATI's technology which has been in the works about the same time as NVIDIA's secret successor and why exactly are they preaching this way of shaders. What eactly is making them confident this is the way and what type of answer or threat does this mean to NVIDIA to make them so giddy to go skip along preaching this technology and confident to based Xenon and their future GPU's for years to come on this idea. I don't just mean features on paper, I mean early hardware and performance analysis. What made their engineers wide mouth flashing the lights on and off and slapping their shoes on the wall saying "we have a winner". :lol

 

[ThirdEye]

Third eye read Panajev2001a post he knows a lot more than many.

"For certain the ISSCC 2005 CELL CPU will be a 1 PU, 8 SPU's/APUs system, this can be said.

It is likely that this will be the final set-up for various reasons: yelds, performance being more than enough and probably enough to to keep the I/O bus connecting all the chips together, etc..."

The PS3 is not going to have a 4 PU 32 setup, it doesn't need it. As Pani said one PU 8APU is more than likely what we will se in the PS3 for the reasons he pointed out.

Oh well. In 2000 who needed 6.2GFLOPS theoretical performance? I'm tired about such a lame argument. I know I only refer to the theoretical performance, not real-world. Also, Panajev2001a seems to have no clue about the actual yeild pattern of the 65nm process and so on, neither do I, so speculation is free until ISSCC 2005. Remember that the PS3 is a product of the next 5 years.

 

[Fafalada]

However, I'm curious as to why they rather have two separate optimized parts to do all the work in their hardware. They did their work in trying to sway in their favor which makes me curious as to how optimized and what these shaders can do to be more then enough to make NVIDIA think they can compete with/have an edge/or blow out ATI's high end. It would have been a very interesting battle and it certainly looks like PS3 will be our only glimpse of this battle that was to come.

That depends - there is a possbility that PS3 implementation might not have VertexShaders at all - which would make argument about comparing different approach to unified shaders moot (on the console front).

 

[Panajev2001a]

Running multiple OS's at the same time is not some new "mega wow" feature. It's always been there and done before on many computing clusters.

I am not aware that OS Virtualization (the buzz-word for the ability of running multiple OS's at the same time) being supported in Hardware in a single chip was underwelming .

It is one of the best ways to learn, tweak, and tinker when studying the science of operating systems at the grad level. It is nothing knew, anything with similar computing characteristics such as cell can do it.

Look, many of us are not stating CELL is a revolution, many of the concept you will see deployed in new CPU's for the next 5-10 years are all out there... thinkered in Research Labs, in Universities or at Xerox . What is nice about CELL is that many of those ideas, thanks to the improovements in manufacturing technology and greater experience of CPU architects and Circuit Designers, are coming together in an architecture like CELL.

If company XYZ made the REYES Engine, a single chip solution capable of rendering PRman shaders and scenes of the complexity of say Monster Inc. I will still applaud them even though, in a million years or so of rendering time, a C64 could have done the same thing: it is all about computing efficiency, power consumption, size and manufacturing costs.

Much of what Pana mention is pretty much out there if you take the time and read.

You seriously expected that I would make forum posts using for them sources that are not already public in some sort thus divulging those things (whether inside rumors or factual truths)? Not gong to happen .

And I also have my curiosities in this area. For example, I know NVIDIA is going to take it up the rear and fully implement unified shaders. However, I'm curious as to why they rather have two separate optimized parts to do all the work in their hardware.

The way I see it is mainly due to the latencies the two units are designed to sustain: Pixel Shaders have to tolerate higher latencies more often than Vertex Shaders do, they (for example) write, sample and filter textures (you can call them buffers instead of textures if you want) considerably more often than what Vertex Shaders do and thus they need to be able to multi-thread (pause one pixel, store the context in a temp buffer and move to the next pixel to execute the shader on it waiting for the texture fetch to be completed for the stalled pixel) between pixels: having 32-64 hardware contexts is not unheard of.

nVIDIA does not see the Vertex Shader to have to bear such high latencies and most likely wants to be able to have more compact and faster Vertex Shaders. The need for fast Vertex Shaders is still out there: the Pixel Shaders need something that set-ups their work.

What made their engineers wide mouth flashing the lights on and off and slapping their shoes on the wall saying "we have a winner". :lol

Likely they expeimented, constructed models of what technology allowed in the time-frame their new architecture would have to come out, the resources needed fr such a Unified Shader ALU and saw that they could work a GPU that was amazingly fast (not slower than ATI's GPU from their projected figures and analyses) with less money spent in R&D (both Hardware and Software).

ATI has the advantage now because they had a relative false step with the R3XX to R400 or R420 transition: the R400 pulled quite a bit of resources IMHO and getting the R420 out in time was asignificant effort that also eased nVIDIA recovery from the NV30 situation and turn the tables with parts such as the 6800 Ultra and the 6600 GT.

Likely nVIDIA, in the longer-term future, might move to such a Unified Shader ALU (if you think in REYES terms there is no such separation between Vertex and Fragment processing), but they feel that at this point in time they would be able to produce a better GPU going their own way than copying ATI. Remember when ATI was going around doing damage control against Shader Model 3.0 features because "their part in which they would be able to support them at full speed was not out yet" ? Quite a scandal back then :lol.

 

[Panajev2001a]

Also, Panajev2001a seems to have no clue about the actual yeild pattern of the 65nm process and so on, neither do I, so speculation is free until ISSCC 2005.

Ok, wait for your 4.6 GHz, 4 PEs, 32 APU's system in PlayStation 3.

Having a clue, or the way you seme to put it knowing the ins and out of it, of SCE's CMOS5 process is a bit hard as they have not hit anything remebling even medium volume production in any of their manufacturing plants.

Their current 90 nm process is a pure bulk-CMOS process and it is true that their 65 nm process will be using SOI technology: the problem is that SOI is not a magic wand... normally it provides benefits in either of the two areas: higher clock-speed at the same or similar power consumption, lower power consumption at the same or similar clock-speed.

Gate Leakage might be taken care of in some way, but we do not know if it will be much reduced from what they have on their 90 nm manufacturing process (CMOS4).

The PU's are still unknown, but from what it is possible to ctach they are bigger than people thought (from the earlier patents to the latest it seems they have moved to improove general purpose processing efficiency). You have figures for the SRAM cell size SCE+Toshiba is going to use in their CMOS5 manufacturing process and you can make guesses about the SPU's/APU's (thinking about 128 KB of Local Storage or the rumored 256 KB). You come up with more than 270 mm^2 for such a chip and all at 4.6 GHz when in 90 nm they hit 4.6 GHz with a single PE ?

You can look at Xenon (whose first implementation will probably be in 90 nm SOI technology): 3.5 GHz (rumored specs), three PU's with a 1 MB L2 shared by the three PU's and 3 super-VMX units (128x128 bits registers, etc...).

SPU's/APU's add to each Vector Unit (if you compare them with VMX units) 128-256 KB of Local Storage along with the same Register File size and it is probable that we have a DMA engine for each SPU/APU complex too adding to the tax we have to pay for more SPU's/APU's.

I think CELL is already achieving something by beating that configuration in clock-speed and number of Streaming Processors (which IMHO are a little more complex than VMX co-processor units, but we do not know the final VMX unit configuration for Xenon's CPU)., no need to push for a "1+ TFLOPS else it is all a failure" kind of argument.

 

[DonasaurusRex]

Scandal? They felt SM 3.0 wasnt going to have much impact before the R500 was released. In a way they were right SM 3.0 was brand new, not many games even featured it, some slides from a meeting got leaked to the net a few months back. Basically saying not to dwell on SM 3.0 because their next gen card did it much better and it wouldnt make sense to worry about a window of about 10 months. Which is true if you think about it, even though the new high end Nvidia cards were out, how many people in the market actually had them, and would actually have them by the time the next gen cards tapped out? Not many in the grand scheme of things, especially considering the high end *enthusiast* cards were the low volume high price solution that could really utilize the feature. Its like the debate between DDR2 and DDR support. Amd thinks why would someone bother to put resources into DDR2, if DDR3 is on the fast track for being validated. Ati just reasoned ok this is the latest and the greatest, but what games will actually use it, a very small percentage, how many people are going to drop 300-450 dollars to get their hands on these cards SOLELY for this feature? Not many, so why put resources into making it work this gen , if it can be cheaply done next gen with better performance.

 

[mrklaw]

can somebody clarify vertex shaders Vs pixel shaders? Pixel shaders I understand, normal mapping, all that stuff you do at pixel or texel level. But what about vertices do you shade? Is it just a handy way of describing vertex transformation, or is it something more?

 

[marsomega]

Lovely to hear from you Panajev. *Flashes lights on and off tapping foot and hitting shoe on the wall. :lol I keed I keed. So I hear your italian? Cool if you are. Original or decendant?

I am not aware that OS Virtualization (the buzz-word for the ability of running multiple OS's at the same time) being supported in Hardware in a single chip was underwelming .

Pana, in that whole segment I wasn't saying reducing the hardware for OS virtualization wasn't a good thing. In fact, when I read that IBM would be using it in their workstations/servers this immediately came to mind. I can definately talk about benefits that cell would have on this segment as well as research areas and at the same time back it up. I think both you and I can agree on this. My criticism was on Sony PR using this for PR on the PS3; I was basically saying it's nothing but hot air in that respect. Unless Sony is also aiming to sell the PS3 to certain countries to serve as their new "research" computing clusters. ;P Anyone remember the wild rumors of Iraq or was it Iran using 1000 PS2's to simulate and research nuclear weapons? Tee hee.

Look, many of us are not stating CELL is a revolution, many of the concept you will see deployed in new CPU's for the next 5-10 years are all out there... thinkered in Research Labs, in Universities or at Xerox . What is nice about CELL is that many of those ideas, thanks to the improovements in manufacturing technology and greater experience of CPU architects and Circuit Designers, are coming together in an architecture like CELL.

If company XYZ made the REYES Engine, a single chip solution capable of rendering PRman shaders and scenes of the complexity of say Monster Inc. I will still applaud them even though, in a million years or so of rendering time, a C64 could have done the same thing: it is all about computing efficiency, power consumption, size and manufacturing costs.

Like I said earlier, my criticism was on some of the claims in the PS3 PR and their relevancy. I didn't necessarily mean to direct any attack towards anyone. I'm just bringing something to attention thats been looked over without some decent thought. Apparantly the clock speeds and GFLOPS back it up alone, I disagree. I'm not bashing PS3 as a whole, I'm speaking about a specific part that dances over the line seperating fact and generic #forum member (not referring to anyone specifically) raving. And that specific part is the idea (and claim) of node based PS3 computing cluster over the internet equally distributing graphical processing power among all PS3's so they all look the same. Least I think thats the main one, I've seen so many variations I lost count. I've seen it though I think vaguely in the Sony PR as well. I kept a "wait and see what they really meant" state of mind about it. However, it's come up time and time again but nothing to back it up, then it disappears.

You seriously expected that I would make forum posts using for them sources that are not already public in some sort thus divulging those things (whether inside rumors or factual truths)? Not gong to happen .

PM me please. Pana just try ok, I know the many forums of the internet have given you a hard defense shell but try to just think of my post not as an offensive one. Just a discussion from someone being open minded about it. That said, that statement was really towards everyone. Basically you don't have to be some ultra high tech savvy person to pick up on these things. Or in other words, I was trying to encourage/make better fanboys/forum members. Maybe I was naive. :lol Hey if it makes posters more informed and improves the discussion why not.

The way I see it is mainly due to the latencies the two units are designed to sustain: Pixel Shaders have to tolerate higher latencies more often than Vertex Shaders do, they (for example) write, sample and filter textures (you can call them buffers instead of textures if you want) considerably more often than what Vertex Shaders do and thus they need to be able to multi-thread (pause one pixel, store the context in a temp buffer and move to the next pixel to execute the shader on it waiting for the texture fetch to be completed for the stalled pixel) between pixels: having 32-64 hardware contexts is not unheard of.

nVIDIA does not see the Vertex Shader to have to bear such high latencies and most likely wants to be able to have more compact and faster Vertex Shaders. The need for fast Vertex Shaders is still out there: the Pixel Shaders need something that set-ups their work.

I'm pretty caught up in that respect from reading most of the material as well as the material from NVIDIA's chief scientist David Kirk. What I was referring to was to NVIDIA being completely stubborn about it. Going in on an interview and just stating "we are just not interested". Only until Kirk's recent interviews have I had a glimpse at some of the reasons on paper. But my curiosity goes beyond that. I have my doubts, they aren't that blind enough to completely look the other way only for something to have a chance to come right back and slap them in the face as well as a backhand to the face with the refresh and a punch to the kidney's on another platform (Xenon). ;P They had to have some work in the area or seen something or received creditable information to physically back up their end of graphic computing pool.

Likely they expeimented, constructed models of what technology allowed in the time-frame their new architecture would have to come out, the resources needed fr such a Unified Shader ALU and saw that they could work a GPU that was amazingly fast (not slower than ATI's GPU from their projected figures and analyses) with less money spent in R&D (both Hardware and Software).

ATI has the advantage now because they had a relative false step with the R3XX to R400 or R420 transition: the R400 pulled quite a bit of resources IMHO and getting the R420 out in time was asignificant effort that also eased nVIDIA recovery from the NV30 situation and turn the tables with parts such as the 6800 Ultra and the 6600 GT.

Likely nVIDIA, in the longer-term future, might move to such a Unified Shader ALU (if you think in REYES terms there is no such separation between Vertex and Fragment processing), but they feel that at this point in time they would be able to produce a better GPU going their own way than copying ATI. Remember when ATI was going around doing damage control against Shader Model 3.0 features because "their part in which they would be able to support them at full speed was not out yet" ? Quite a scandal back then :lol.

Take what I just said and flip it around. I'm very curious on the ATI end as well. . They are going on their third new GPU based on the R3XX series. They've been on what was formly known as R400 tech for quite some time and convinced MS on both their Xenon and Longhorn platforms and have not been affected by NVIDIA's words on paper (and what ever information they've gotten their hands on). Obviously much R & D has gone into this tech, but they certainly have something to show for it and I'm sure MS has seen it.

Can't wait... Tee hee hee

 

[GameCat]

It's just a fancy name for vertex processing, yes. Tranformation and skinning, setup for pixel shaders, per vertex lighting, that sort of thing.

 

[mrklaw]

It's just a fancy name for vertex processing, yes. Tranformation and skinning, setup for pixel shaders, per vertex lighting, that sort of thing.

cheers. Then I fully expect thats what the CELL will be doing, leaving all the GPU transistors free to do pixel shaders. The CELL is designed from the ground up to be a giant vector processing factory, so using it just for physics and a bit of AI is crazy.

I wonder what NVidia can do with the same transistor budget as their normal high-end cards but without the need for vertex transformations etc? I guess they'd fill the space with eDram?

 

[doncale]

one PE will be ok in PS3 IF that PE has one larger, more complex PU, that is a full highend PowerPC or POWER core, unlike the simpler core thought of before. plus 16 APUs that each have 8 FPUs and 8 Integer Units. 256k per APU. plus 64-128 MB eDRAM

 

[Pimpwerx]

Cell's lynchpin is that it's scalable. Yes, that means the number of APUs per PE, but also the number of PEs. I fail to see the point in investing this much money to only implement one PE into the final design that's gonna ship the most units. I mean, before the Nvidia announcement, wasn't everyone "sure" there was gonna be a 4 PE system that basically brute-forced the graphics? Now, we're scaling that back to a single 256 GFLOP part? I'm honestly not impressed, and I'll personally chime in with the haters at Kutaragi's team for missing the 1000x PS2 comments.

Really, it's a step up from the processor the Xenon will have, but with 1 PE, it won't exactly be the earth-shaker it as once proposed to be. Seriously, the 1 TFLOP bug has bitten and won't let go. I want to see it done. I want to see it done on the PS3. Great expectations? I guess so. PEACE.

 

[gofreak]

Cell's lynchpin is that it's scalable. Yes, that means the number of APUs per PE, but also the number of PEs. I fail to see the point in investing this much money to only implement one PE into the final design that's gonna ship the most units. I mean, before the Nvidia announcement, wasn't everyone "sure" there was gonna be a 4 PE system that basically brute-forced the graphics? Now, we're scaling that back to a single 256 GFLOP part? I'm honestly not impressed, and I'll personally chime in with the haters at Kutaragi's team for missing the 1000x PS2 comments.

Really, it's a step up from the processor the Xenon will have, but with 1 PE, it won't exactly be the earth-shaker it as once proposed to be. Seriously, the 1 TFLOP bug has bitten and won't let go. I want to see it done. I want to see it done on the PS3. Great expectations? I guess so. PEACE.

No, lot's of people, for a long time, did not expect a 4PE solution (1Tflop). It would have been...foolish....to expect such. I mean really think about it: 1Tflop. It's not going to happen, and few who actually knew what they were talking about expected that.

There was a lot of talk about the patents, and the 4PE "example" therein, but very few people realistically expect that to manifest itself in PS3.

And a massive rolleyes at "if kutaragi doesn't hit 1000x, i won't be happy!!". Seriously. Regardless of what Kutaragi may or may not have said, judge their achievement relative to everyone else.

 

[Duckhuntdog]

they will probably try to increase the speed. I wonder who will present their next gen plans at E3 first


should be very interesting :lol

I could be wrong, but every indication is that the Xenon specs are pretty much locked down at this point.

 

[Duckhuntdog]

Hm,
Power: PS3>>>>Xenon>>Revolution

Well at this point, the PS3 part is true.

 

[HokieJoe]

I thought that one of the reasons that IBM entered the CELL arangement was to build CELL based servers and share the development cost of the technology with other parties. Sounded more like everyone had their own reasons to participate in CELL development and no one party was the "reason" for CELL.

True, and equally true for Toshiba wrt to CE devices. More accurately stated, the CELL is the raison d'etra for SONY, notwithstanding all of the other CE devices they manufacture as well.

 

[HokieJoe]

Cell's lynchpin is that it's scalable. Yes, that means the number of APUs per PE, but also the number of PEs.

The maximum number of APU's per "cell" is eight from what I've read

 

[Panajev2001a]

can somebody clarify vertex shaders Vs pixel shaders? Pixel shaders I understand, normal mapping, all that stuff you do at pixel or texel level. But what about vertices do you shade? Is it just a handy way of describing vertex transformation, or is it something more?

Vertex Shaders take the place nowadays also of regular fixed function T&L, but they can do more than that of course.

You can displace vertices current Vertex Shaders lack the ability of creating/deleting new vertices... although there are tricks to get around that IIRC).

You can use them to set-up bump-mapping/normal-mapping calculations for the Pixel Shaders, skin vertices, etc... any operation you can think of on vertices... all kinds of animation (what is an animation, but displacing a vertex ?) , calculate the lighting at the vertex level using the kind of algorithm you want, etc...

This is from FutureMark's website:

# Vertex Shader
A small program or routine used to perform specific calculations to a vertex. The term is also incorrectly used to describe the part of the graphics processing chip that performs these calculations. Their use in Direct3D first appeared in DirectX 8, consisting of two versions: 1.0 and 1.1 (the former is now considered to be a legacy option as there is no hardware on the market that supports this version). The latest version of DirectX, 9.0, offers additional revisions too: 2.0, extended 2.0 and 3.0, as well including the previous 1.1 too.

Vertex shader routines can require very complex calculations but since most of the operations are essentially vector calculations, a modern CPU can perform the tasks to a similar level as a modern graphics adapter. It is only where the shaders become more complex that custom-developed hardware performs considerably better than a CPU. Vertex shaders offer greater flexibility in terms of use and programming when compared to the "fixed-function" abilities of the standard texturing pipeline. Each successive vertex shader version offers more functions, controls and capabilities than the previous version; there are currently 3 hierarchical levels of shaders: 1.x, 2.x and 3.0.

 

[HokieJoe]

I find that hard to believe. Neither IBM, nor Intel are able to hit evn 4.0 gigahertz, nevermind more than 4.5.

:lol

Especially considering that the PowerPC architecture is RISC-based, which run hotter than the traditional CISC-based designs from Intel and AMD. This makes me equally skeptical of MS's claim of 3x3.5GHz PPC cores on one CPU. I don't know, maybe IBM has something up their collective sleeve.

Apparently, there will be a Power based processor in the Cell; but from what I've read it will be somewhat akin to the control module in a typical CPU; and it will shephard, in raw terms, the activity of the APU's.

I'm guessing that they aren't measuring raw clock speed even at 90nm with SOI tech. IMO, their speed measurement is an approximation- like AMD or Intel's "speed" ratings.

Either way, I think both designs are compromised because neither utilizes a true unified memory architecture similar to SGI’s. After all, the biggest problem PC’s have now is that CPU power totally trounces bus speed. You have to have huge buses to push the kind of memory bandwidth they’re talking about, huge buses are expensive to fab and to sell.

 

[Panajev2001a]

Lovely to hear from you Panajev. *Flashes lights on and off tapping foot and hitting shoe on the wall. :lol I keed I keed. So I hear your italian? Cool if you are. Original or decendant?

Who talked ?

Yes, I am original and currently I am in Italy too.

Like I said earlier, my criticism was on some of the claims in the PS3 PR and their relevancy. I didn't necessarily mean to direct any attack towards anyone.

I understand, sorry if I over-reacted .

Pana just try ok, I know the many forums of the internet have given you a hard defense shell but try to just think of my post not as an offensive one. Just a discussion from someone being open minded about it. That said, that statement was really towards everyone. Basically you don't have to be some ultra high tech savvy person to pick up on these things. Or in other words, I was trying to encourage/make better fanboys/forum members. Maybe I was naive. :lol Hey if it makes posters more informed and improves the discussion why not.

I mis-interpreted... apparently my ego is growing an ego too . I agree with you, the more people informed the better it is... for all o us and for the industry in itself (greater attention/care for detail would help against the Madden 2020 with yet another minor improovement to dominate the sales while great games sell a ridiculously low amount of copies).

 

[Panajev2001a]

[...] the PowerPC architecture is RISC-based, which run hotter than the traditional CISC-based designs from Intel and AMD.

[...]

Uhm... a bit too broad of a statement there IMHO.

 

[Panajev2001a]

Cell's lynchpin is that it's scalable. Yes, that means the number of APUs per PE, but also the number of PEs. I fail to see the point in investing this much money to only implement one PE into the final design that's gonna ship the most units. I mean, before the Nvidia announcement, wasn't everyone "sure" there was gonna be a 4 PE system that basically brute-forced the graphics? Now, we're scaling that back to a single 256 GFLOP part? I'm honestly not impressed, and I'll personally chime in with the haters at Kutaragi's team for missing the 1000x PS2 comments.

Really, it's a step up from the processor the Xenon will have, but with 1 PE, it won't exactly be the earth-shaker it as once proposed to be. Seriously, the 1 TFLOP bug has bitten and won't let go. I want to see it done. I want to see it done on the PS3. Great expectations? I guess so. PEACE.

just to clarify the 1,000x comment: do you really believe that you will not find games on PlayStataion 3 at 60 fps that if they had to be implemented with the same graphical quality and effects (at the cost of doing it in software) would probably run at 0.06 fps ?

 

[HokieJoe]

Uhm... a bit too broad of a statement there IMHO.

Clarify please.

 

[Panajev2001a]

Clarify please.

You said something that is IMHO not supported by facts IMHO and made it look like this abstarcted law. You basically said that since processor A is a PowerPC and it is RISC it will consume more power and run hotter than a x86 CISC chip.

 

[Phoenix]

But thats SERVER servers. Not home media ones. Home media servers would be a big hard drive with network connectivity, sitting under your TV for recording and playback of TV and streaming from your PC. Doesn't need a big-ass chip

Actually it does. If you are going to encode and decode video streams without other external hardware encoder/decoder then you need a monster CPU - especially if you're doing HD content.

Server servers, like IBM are planning, are the big things in companies handling thousands of data streams concurrently, sending data back and forth, keeping company IT systems moving. They need a lot of computing power in total, but usually come in sections, so I would only expect each section to need a relatively low powered CELL.

If you're talking about webservers and the like yes. If you're talking about streaming media servers - you need a good amount of CPU. If you're doing datacrunching applications like IBM generally sells their servers for or general J2EE applications - you want more CPU than even IBM is going to sell you with the Cell/Power5/etc

In fact, I don't know what applications, other than PS3, need such a powerful cutting edge design. Maybe they don't, it was just a sweetner used from Sony to help keep their costs down?

There are PLENTY of applications other than the PS3 that need a CPU of that scale and far more that need even more. Come to Atlanta, I'll show you a couple

 

[Phoenix]

can somebody clarify vertex shaders Vs pixel shaders? Pixel shaders I understand, normal mapping, all that stuff you do at pixel or texel level. But what about vertices do you shade? Is it just a handy way of describing vertex transformation, or is it something more?

When the shading languages are joined it won't matter, but there are two types of operations you perform on an objeect - operations on its geometry (or vertices) and operations on its 'texture' (pixel shaders). When you talk about subpixel accuracy of lighting and bump maps, texturing, fur (unless you actually modelled it) and the like you're talking about the pixel shade side of the house. When you're talking about skinning, animation, or real time deformations of objects at the vertex level (like crumpling up a car from a wreck) you're generally talking about vertex shader side of the house.

The 'shading' part is just an aberration of marketing - though you can assign colors and the like to vertices

 

[seanoff]

i know bugger all about this apart from what i've picked up.

So what are the chances that the conference CELL is a lower level model given it only has one PE? Given that the architecture is scalable and all.

don't shoot me down, i'm just asking what the possibility is.

 

[Phoenix]

i know bugger all about this apart from what i've picked up.

So what are the chances that the conference CELL is a lower level model given it only has one PE? Given that the architecture is scalable and all.

don't shoot me down, i'm just asking what the possibility is.

Its possible, but I think that what we're seeing (will see) is pretty close to the max that we're going to get. The yield on this chip will determine its fate If they get stupid high yields (yeah right) then sure - we may get something faster. It reminds me of looking at my first Power5 pictures - the thing is bigger than the palm of your hand. The new chips (and their packages) consume an INCREDIBLE amount of real estate and generate an almost ludicrous amount of heat. Don't with for the stars with this one, and while you're at it - consider what you're actually getting. From reading some of the impressions here some people think that this chip is some sort of letdown. If they could actually fab this and put it in a PS3 without making you or your house combust the moment it turns on, you'll see some of the best CPU performance not yet witnessed on anything less than a superscalar server costing at least 10 times what the PS3 is expected to cost!

 

[shpankey]

Both GPUs in Xbox 2 and PlayStation 3 will be very very very very fast IMHO.

i know this is a very dumb and generalized question, but if you had to completely guess, do you think there will be a very big difference in graphic quality next gen? or will it be like this gen, where it's pretty small? i know it all matters on this and that, but i'm just wondering what you think might happen or whatever. i certainly of course wouldn't hold anyone to anything as it would be pure guesswork.

p.s. you and guys like you in here are just insanely brilliant heh. wish i had those kind of brains.

 

[Pug]

Duckhuntdog, not all the specs for XBOX2 are locked down yet, although they will be soon also read Panajev posts, although the PS3 will certaintly have the edge with regard to Gflops ratings the Xbox2 may well stronger in other areas. Shapankey, thats a question I put to both Panajev and DeanoC and both gave quite complex answers but if you look at Panajev post in this thread, it tends to point to everything being very similar. This is why I think MS is comfortable releasing before PS3 in the US and Europe they also seem to think that graphically there will little or no difference. judging on the great posts from Panajev and others its almost certain now that differences will minimal.

 

[HokieJoe]

You said something that is IMHO not supported by facts IMHO and made it look like this abstarcted law. You basically said that since processor A is a PowerPC and it is RISC it will consume more power and run hotter than a x86 CISC chip.

To clarify, I was speaking within the context of the IBM PPC and the x86 CPU manufactured by Intel and AMD. Within that context, generally speaking, the RISC architecture runs hotter than the CISC architecture.

It's true that that isn't the whole picture. Increasing the pipeline length of the PPC helped mitigate the GHz discrepancy, but innovations like SOI and copper interconnects speak to the need to lower temps so that they could up the frequency.

BTW, I'm not saying that clock speed is everything either. The AMD XP+ series forward and the PPC vs. the P4 is evidence enough of that in terms of IPC. After all, what we're talking about at this point, aside from conjecture of course, is marchitecture (marketing) as much as architecture.

 

[ThirdEye]

To clarify, I was speaking within the context of the IBM PPC and the x86 CPU manufactured by Intel and AMD. Within that context, generally speaking, the RISC architecture runs hotter than the CISC architecture.

It's true that that isn't the whole picture. Increasing the pipeline length of the PPC helped mitigate the GHz discrepancy, but innovations like SOI and copper interconnects speak to the need to lower temps so that they could up the frequency.

BTW, I'm not saying that clock speed is everything either. The AMD XP+ series forward and the PPC vs. the P4 is evidence enough of that in terms of IPC. After all, what we're talking about at this point, aside from conjecture of course, is marchitecture (marketing) as much as architecture.

RTFA as ISSCC != CES/E3... no marketing allowed there.

 

[Pimpwerx]

Meh, I know the "1000x PS2" stuff is hyperbole, but with a 4 PE Cell, it seemed like they were at least gonna give it a ride. Now...256 GFLOPS is impressive, and the chip could always end up bumping to a higher clock. But I'm honestly not impressed. Not with all the buzz from last year. You can't lower expectations in the final hour like that. I'm totally a victim of great expectations here. I'm hoping Sony somehow proves us wrong. PEACE.

 

[HokieJoe]

RTFA as ISSCC != CES/E3... no marketing allowed there.

True nuff!!!

 

[HokieJoe]

Meh, I know the "1000x PS2" stuff is hyperbole, but with a 4 PE Cell, it seemed like they were at least gonna give it a ride. Now...256 GFLOPS is impressive, and the chip could always end up bumping to a higher clock. But I'm honestly not impressed. Not with all the buzz from last year. You can't lower expectations in the final hour like that. I'm totally a victim of great expectations here. I'm hoping Sony somehow proves us wrong. PEACE.

Ahhh, SOI, GFLOPS, APC, dis' will be faster than dat': it's like a soap opera for geeks.

I don't know man, IMO, 4.6GHz is pretty impressive (IF TRUE) at launch whether it's actual GHz or derived GHz. I say that expecting that they will have some room to scale clockspeed. If all of their scaling has to do with adding more cells then that is a slightly different matter. However, I think everyone is bumping up against the power dissapation factor at this point in time.

Hell, 3.5GHz for the Nextbox is impressive (IF TRUE) on a PPC core. The PPC's central strength really never lied in raw GHz, it lied in the RISC architecture and IPC. For that matter, the same could be said of Intel wrt IPC/heat dissapation, ergo, dual core tech instead of 4GHz. ;-)

I still say, based upon pure speculation of course, that both platforms could realize much greater efficiency by going with with a true shared memory architecture.