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Next-Gen PS5 & XSX |OT| Console tEch threaD

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SonGoku

Member
May be, but its much more realistic then fakes such as "My dad works at Nintendo and I work as junior Indie dev. PS5 will have 14.2TF and GTAVI will be launch title"
Osiris and Benjii leaks aren't any less real, heh im not a fan of leaks/insiders either way.
 

R600

Banned
Osiris and Benjii leaks aren't any less real, heh im not a fan of leaks/insiders either way.
I agree, Benji leak is good, but remember, that is January leak on late 2018 Dev Kits. Does anyone here really think these dev kits had anything other then Vegas in there? Absolutely 0% chance they had Navi/Zen2 soc.
 
They are 2GB capacities therefore you would actually need 8 of them for 16GB.

so you're saying the doubled the amount of modules on the dev-kit PCB instead of doubling the capacity of each?


first ryzen 5 3600 nonX review:


 
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Darius87

Member
The only way that's happening is with 7nm EUV, maybe that was Sony plan all along 315mm2 on 7nm EUV is roughly equal to 400 mm2 on plain 7nm 56-64 enabled CUs 12-14TF possible on that node
why you think sony can go with 7nm EUV but ms can't? i think both companies will use latest technologies or litography process.
So i wouldn't worry, all things point to Sony going with a big die on plain 7nm or conservative die on 7nmEUV
i haven't see any rumor that sony going with big die i don't know why you think so? there's only 1 probable rumor which suggest sony's apu is 315mm2.
 

SonGoku

Member
why you think sony can go with 7nm EUV but ms can't? i think both companies will use latest technologies or litography process.
I dont, im just making fun of the PS5 lowballin which is just as ridiculous as Sony going with EUV tech and MS not.
But to play devils advocate since everyone seems to like rumors, rumors point to PS5 being further ahead in development maybe Sony got their 7nm EUV tapeout earlier
i haven't see any rumor that sony going with big die i don't know why you think so?
Plenty of leaks point to PS5 being a Kaiju, 13TF figure going around, dev comments etc
For that 56CUs minimum needed
 
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Aceofspades

Banned
I want Sony to use HBM2 to reserve power consumption then go ham with GPU power. I have read somewhere that HBM uses ~1/4 the consumption of Gddr6, massive power saving there.
 

SonGoku

Member
2080 is 448Gb/s , over 700Gb/s is what I think too but with what you said earlier im not sure I follow why you don't except above 2080ti then
Nvidia arch is more bandwidth efficient they do more with less. I was talking of compute/rendering performance
Graphics rendering wise rtx2080 take or add is what i expected, which is an absolute KAIJU don't worry
 

Ovech-King

Member
Nvidia arch is more bandwidth efficient they do more with less. I was talking of compute/rendering performance
Graphics rendering wise rtx2080 take or add is what i expected, which is an absolute KAIJU don't worry

Still think that for consoles releasing 2 years after these cards launched , this is very conservative given the cost they will pay for the hardware they will end up offering. Specially since it seems the baseline will be 4k 60 fps and ready for 8k. They need to be packed.
 

Gamernyc78

Banned
Osiris and Benjii leaks aren't any less real, heh im not a fan of leaks/insiders either way.
Very true. Or certain fans putting Ps5 guesstimate at a lower tflop number just bcus they are fans of Microsoft and hope it is. I can't wait for more valid info
 

R600

Banned
April actually and that isnt any younger than the gonzolo leaks
Sorry I mistaken that for Osiris one that was November. For example, Osiris says Navi 1.21GHz, which is absolute low balling even by GCN standards, let alone Navi. Furthermore, they couldnt achieve 13-14.2TF with those clocks in Navi in million years, which tells you how unlikely is that this leak was right.
 
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Audiophile

Member
I imagine it would work like the Nintendo Switch development process (portable vs docked, portable mode is the baseline and docked just offers a resolution bump with slightly better fps/effects).


If Zen 2 becomes the baseline and devs target 30 fps (once again), Jaguar-based consoles would run 4 times slower: 7-8 fps. :)

If the baseline goes up to 60 fps, Jaguar-based consoles would run at 15 fps.

There's also a chance that next-gen AI will utilize GPU cores (think of Tensor acceleration for deep learning/neural networks), which will make forward compatibility for GCN-based consoles even harder:



......


Mandatory GIF:

insta-txt.gif


Blank Version
 

SonGoku

Member
Still think that for consoles releasing 2 years after these cards launched , this is very conservative given the cost they will pay for the hardware they will end up offering.
11TF-12TF with 600-800GB/s bandwidth will be an absolute kaiju and punch well above its weight on a closed box
To get 14TF we need 7nm EUV
Sorry I mistaken that for Osiris one that was November. For example, Osiris says Navi 1.21GHz, which is absolute low balling even by GCN standards, let alone Navi. Furthermore, they couldnt achieve 13-14.2TF with those clocks in Navi in million years, which tells you how unlikely that leak was right.
Gonzolo was 1ghz at one point to...
That still leaves Benjii 12.9TF
 

xool

Member
but for 16 can you use a 256? seems like instant bottle neck

why would you go trough the hassle of 16 modules and than use such a narrow bus? 512bit bus or bust :p

no really 16 modules makes no sense. neighter cost, nor power, nor design wise.

Eh? GDDR6 has 32 bit data bus - so 16 chips = 512 bit wide data bus total. They're 16Gb/s per pin chips so bandwidth = 512*16 = 8192Gb/s = 1024GB/s

Its not bottleneck because in case of 16Gbps chips you are looking at 512 GB/s. 448 for GPU, 64 for Zen2. Exact sweetspot.
It doesn't work like that. If either tries to access the same block of memory (same chip) throughput is halfed, and latency increases..
 

R600

Banned
11TF-12TF with 600-800GB/s bandwidth will be an absolute kaiju and punch well above its weight on a closed box
To get 14TF we need 7nm EUV

Gonzolo was 1ghz at one point to...
That still leaves Benjii 12.9TF
Gonzalo was also Navi Lite in its codename. How do you get 1.8GHz Navi with 56CUs + RT, Zen2 and 16GB at minimum when Navi XT with 8GB and 9.7TF eats up 225W? In what movie is that possible?
 

CrustyBritches

Gold Member
I thought the OsirisBlack leaks were 2.1GHz GPU and 18GB? He later told me via pm those had changed a bit.

Edit: Found Osiris leak...
AMD Ryzen cpu custom configuration 3.20 , 7nm Navi gpu 2.1 18gddr5 Is what I heard a while ago. As far as the public announcement It will be soon. I sent this info to a mod a while ago I couldn’t post until something else leaked first. I’ll post everything now that something semi accurate is out there.
 
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Darius87

Member
I dont, im just making fun of the PS5 lowballin which is just as ridiculous as Sony going with EUV tech and MS not. But to play devils advocate since everyone seems to like rumors, rumors point to PS5 being further ahead in development maybe Sony got their 7nm EUV takeout earlier
it's weird because i saw you use same argument before but now you using as excuse for lowballin.

Plenty of leaks point to PS5 being a Kaiju, 13TF figure going around, dev comments etc
For that 56CUs minimum needed
just saying flop & core, spec figures like pc stats doesn't suggest that it has legitimacy, actually it's very amateur leaks more like opinion then a leak, but something like that:

this i would say is more sophisticated and it's worth of "leak" which i would believe more then any of these opinions.
 
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SonGoku

Member
it's weird because i saw you use same argument before
Which argument?
If you check my post history you'll see i've always mantained my position that neither sony/ms would have a node advantage over the other
just saying flop & core, spec figures like pc stats doesn't suggest that it has legitimacy, actually it's very amateur leaks more like opinion then a leak, but something like that:
Thats how last gen leaks were...
Anyone with knowledge can make elaborate hoaxes (binned hbm2 reddit leak) that doesn't give them legitimacy
The more detail is put to make the leak look believable

That isn't a good argument at all.
 
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SonGoku

Member
Die size estimates
75mm for CPU
45mm for 10 GDDR6 controllers (20GB GDDR6)
8.8mm for ROPs
140mm for buses, caches, ACE, geometry processors, shape etc. (over estimating this part as the 5700 seems to have lots of "empty" areas. )

3.37mm2 is the DCU size
  • 118.6mm for 64CUs + RT silicon making CUs 10% bigger compared to Navi10
  • 124mm for 64CUs + RT silicon making CUs 15% bigger compared to Navi10
Total size 387-393mm2
Tensor/RT sillicon takes 22% space on 12nm for nvidia cards, 7nm has a 3.2X density increase (or 0.31X area) over 12nm. So 10% or less is a safe bet for RT silicon on 7nm

396 mm2 with 24GB GDDR6 (12 GDDR6 memory controllers)
For 64CUs APU I'd expect anywhere between 380-390mm2
 
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Darius87

Member
Which argument?
that's sony plan use 7nm EUV.
If you check my post history you'll see i've always mantained my position that neither sony/ms would have a node advantage over the other
so ps5 7nm EUV vs scarlet 7nm isn't node advantage?

Thats how last gen leaks were...
Anyone with knowledge can make elaborate hoaxes (binned hbm2 reddit leak) that doesn't give them legitimacy
The more detaile is put to make the leak look believable

That isn't a good argumentat all.
it's better then saying 13Tflops zen 8 cores/16 threds 24gb ram i think it's unlikely that someone could leak whole spec more then year before console launches.
 

SlimySnake

Flashless at the Golden Globes
Die size estimates
75mm for CPU
45mm for 10 GDDR6 controllers (20GB GDDR6)
8.8mm for ROPs
140mm for buses, caches, ACE, geometry processors, shape etc. (over estimating this part as the 5700 seems to have lots of "empty" areas. )

3.37mm2 is the DCU size
  • 118.6mm for 64CUs + RT silicon making CUs 10% bigger compared to Navi10
  • 124mm for 64CUs + RT silicon making CUs 15% bigger compared to Navi10
Total size 387-393mm2
Tensor/RT sillicon takes 22% space on 12nm for nvidia cards, 7nm has a 3.2X density increase (or 0.31X area) over 12nm. So 10% or less is a safe bet for RT silicon on 7nm

396 mm2 with 24GB GDDR6 (12 GDDR6 memory controllers)
For 64CUs APU I'd expect anywhere between 380-390mm2
i like this post. you have my axe.

what about the TDP though? say the PS5 uses 8gb HBM2 and 16 gb ddr4. They save on the TBP but the actual SoC TDP is still going to be huge for a 60 CU die.
 

SonGoku

Member
that's sony plan use 7nm EUV.
Whenever i say PS5 I include Xbox as well. I generally say next gen consoles
I think the possibility exists next gen consoles might use 7nm EUV
so ps5 7nm EUV vs scarlet 7nm isn't node advantage?
I never said Scarlett wouldn't....
it's better then saying 13Tflops zen 8 cores/16 threds 24gb ram i think it's unlikely that someone could leak whole spec more then year before console launches.
But you think its likely that they'll leak the die size...
PS4/XB leaks were spec leaks
i like this post. you have my axe.

what about the TDP though? say the PS5 uses 8gb HBM2 and 16 gb ddr4.
I think that rumor is fake
The idea of going with a bigger chip is to use lower clocks and voltage so tdp woulnt be too bad
 
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R600

Banned
Problem with TDP is mostly tied to SOC itself, not memory chips, as cooling 8-10 chips on motherboard with 30W is much easier then cooling single 230W 400mm² chip.

So for me HBM2 makes 0 sense as less wattage wont result in bigger or higher clocked SOC.
 
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stetiger

Member
Die size estimates
75mm for CPU
45mm for 10 GDDR6 controllers (20GB GDDR6)
8.8mm for ROPs
140mm for buses, caches, ACE, geometry processors, shape etc. (over estimating this part as the 5700 seems to have lots of "empty" areas. )

3.37mm2 is the DCU size
  • 118.6mm for 64CUs + RT silicon making CUs 10% bigger compared to Navi10
  • 124mm for 64CUs + RT silicon making CUs 15% bigger compared to Navi10
Total size 387-393mm2
Tensor/RT sillicon takes 22% space on 12nm for nvidia cards, 7nm has a 3.2X density increase (or 0.31X area) over 12nm. So 10% or less is a safe bet for RT silicon on 7nm

396 mm2 with 24GB GDDR6 (12 GDDR6 memory controllers)
For 64CUs APU I'd expect anywhere between 380-390mm2
where did you get 118.6mm for 64CUS. Are you saying the amount of cache if fixed. I am fairly confident it increases almost linearly with CU count.
 

SonGoku

Member
Problem with TDP is mostly tied to SOC itself, not memory chips, as cooling 8-10 chips on motherboard with 30W is much easier then cooling single 230W 400mm² chip.
Good point but do you consider the RTX2080 a hot card? 215W 545mm2 chip

btw how do you get mm² ? ms office?
So for me HBM2 makes 0 sense as less wattage wont result in bigger or higher clocked SOC.
agree 100%
 

Darius87

Member
I never said Scarlett wouldn't....
what's difference does it makes ps5 315mm2 7nm Euv vs scarlet 385mm2 7nm Euv? scarlet still would be more powerful then why you even reply to "my lowballin" comment that doesn't makes any sense. :messenger_confused:

But you think its likely that they'll leak the die size...
so? die size and some memory config. what's wrong with that? what do you expect someone to leak?
 
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SonGoku

Member
where did you get 118.6mm for 64CUS. Are you saying the amount of cache if fixed. I am fairly confident it increases almost linearly with CU count.
Im using Proelite calculations, he included cache on the 140 mm2
Each Navi10 DCU is 3.37mm2 3.37*32*1.10 =118
 

Tarin02543

Member
Let's talk about sound.

Since PS5 will have 3D audio, do you guys think there will be a possibility of a built in amplifier for headphones? (a bit like the og megadrive )
 

R600

Banned
Good point but do you consider the RTX2080 a hot card? 215W 545mm2 chip

btw how do you get mm² ? ms office?

agree 100%
I just took number out of my ass tbh :D

Its just to point out that we are not TDP limited as far as memory goes, but SOC. So if they want to go with 400mm² SOC that is rated 230W with GDDR6 chips, you wont be able to clock it higher if you change memory to HBM2 and gain some TDP headroom.
 

SonGoku

Member
so what's difference does it makes sony 315mm2 7nm Euv vs scarlet 385mm2 7nm Euv? scarlet still would be more powerful then why you even reply to "my lowballin" comment that doesn't makes any sense. :messenger_confused:
It was a joke, me making fun of the 315mm2 rumor
But since this is a theory/speculation thread i theorized that Sony got 7nm EUV tapeout earlier than MS due to them being further ahead in development. That doesn't mean MS cant get 7nm EUV just that their earlier design is on 7nm.
For the record i think the rumor is fake and both consoles will have 380-390 mm2 dies on 7nm

so? die size and some memory config. what's wrong with that? what do you expect someone to leak?
Those are more obscure details than specs
 
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Thinking out loud...

PS5 dev summit leak was 12.9 TF which gave 56 CUs @ 1800.

If it was a fake leak then actual specs are higher. You don't give up real numbers in a fake leak. But I digress. Let's play along and assume these numbers are correct.

These were figures circulated at the dev summit, not from dev kits. Developers were told to expect 56 CUs.

Now fast forward and we learn about Navi efficiency gains to the tune of 25%. A teraflop is no longer a teraflop etc.

Will the number of CUs be cut back so we're still hitting a theoretical 12.9 TF GCN equivalent? Or will 56 CUs still be delivered and the extra 25% is a nice bonus for everyone? How likely is it that the CUs would be reduced?

So if we're looking at Navi dual compute units (2 CUs must be disabled at a time) then it makes sense to alter the number of shader engines too to increase yield?

Something like:
  • 64 CU die
  • 4 shader engines
  • 1 dual CU disabled per shader engine to increase yield - tolerate 1 fault per shader engine
  • 64 - (4x2) = 56 CUs active
Maybe we have one player basing their TFs on GCN equivalents and another on Navi TF. So 10.5 Navi flops punching like ~13 GCN TF up against 12.9 Navi TF punching like 16+ GCN TF

Everyone is assuming both systems will be in spitting distance of each other but maybe that assumption is incorrect? These systems have to last 7+ years...
 

SonGoku

Member
I just took number out of my ass tbh :D
I meant how do you type the tiny square 2
Its just to point out that we are not TDP limited as far as memory goes, but SOC. So if they want to go with 400mm² SOC that is rated 230W with GDDR6 chips, you wont be able to clock it higher if you change memory to HBM2 and gain some TDP headroom
Agreed
 

SonGoku

Member
PS5 dev summit leak was 12.9 TF which gave 56 CUs @ 1800.

If it was a fake leak then actual specs are higher. You don't give up real numbers in a fake leak. But I digress. Let's play along and assume these numbers are correct.

These were figures circulated at the dev summit, not from dev kits. Developers were told to expect 56 CUs.
I missed this leak, source?
 

TeamGhobad

Banned
4chan leak:

Behind the backroom, Sony will show PlayStation V to a handful of third parties and independent publishers at Tokyo Game Show 2019.

Sony is bringing back PSX from December 7 to December 8 this year. They will publish the PlayStation V to the press and media, including consoles, several release titles, and release windows (October 2020).

These are all the details I know so far. I will return later if there are more details.
 

ethomaz

Banned
4chan leak:

Behind the backroom, Sony will show PlayStation V to a handful of third parties and independent publishers at Tokyo Game Show 2019.

Sony is bringing back PSX from December 7 to December 8 this year. They will publish the PlayStation V to the press and media, including consoles, several release titles, and release windows (October 2020).

These are all the details I know so far. I will return later if there are more details.
Well safe bet :D
 

Darius87

Member
It was a joke, me making fun of the 315mm2 rumor
really? is it funny? anyone?
|
V
The only way that's happening is with 7nm EUV, maybe that was Sony plan all along
315mm2 on 7nm EUV is roughly equal to 400 mm2 on plain 7nm
56-64 enabled CUs 12-14TF possible on that node

So i wouldn't worry, all things point to Sony going with a big die on plain 7nm or conservative die on 7nmEUV
tenor.gif

both consoles will have 380-390 mm2 dies on 7nm
from sony perspective history disagrees with you.

Those are more obscure details than specs
that's what makes them more legit over casual specs.
 
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