is it possible some of these duplicates can be explained by the need to support two screens?
perhaps each has its own scaler and perhaps other dedicated logic as well?
Also, might as well ask a monumentally noobish question while I'm at it, and get it out of the way

All the empty space we're seeing in between the SRAM on each block, that's due to the process used to photograph the chip? In reality these areas are occupied by a layer of connections that has been removed. Is that accurate at all?
So more empty space would mean more connections?