pcostabel said:Actually, the fine granularity of the Cell architecture makes it easier to code for than Xenon's 3 dual processors.
That is so not true. It's going to be much easier to code for a sane 6-way xenon SMP than it is to code for that crazy DMA/SPRAM/APU monstrosity that Cell is going to be, if the patents are at all close to reality.
MS knows a lot about coding on parallel SMP architectures already. Windows Server 2003 can already run quite well on 64-way SMP machines -- and you can bet that knowledge will apply nicely to a 6-way SMP xenon, if that's really what it is going to be.