Whoa, hold your horses there buddy. The max flops ratings of the ALUs (which is what is being discussed here) have not changed since.. I dunno, R300 perhaps. So it does not matter whether it's GCN or R300 - it's always 2 FLOPs per scalar per clock (clearly referring to MAD/FMAD). What part of that max flop rating can be achieved under what conditions is an entirely different matter (yes, there GCN could have an efficiency advantage with the current crop of compilers). But in the same regard, a more recent VLIW design would likewise be more efficient than Xenos'. So please don't run around claiming how 500-600GFLOP of VLIW is 2x Xenos' 240GFLOP, while at the same time declaring how VLIW is oh-so-less efficient than GCN.