Any chance of nexgen consoles having asymmetrical cores and a task scheduler?

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West City latest tech presented from Dr. Gero right here.
 
The only practical use was for background downloads and updates whilst the console is in standby, but I believe they use ARM cores within the chipset to do that.
 
AMD ZEN 6 Hybrid Concept for PS6:

8 "Worker Cores":
Zen 6c ● 512KB L2 Per Core ● 128-Bit SIMD ● SMT
7C/14T @ 4.0GHz for GAME
1C/1T Disabled for Yield

2 "Showrunner Cores":
Zen 6 ● 1MB L2 Per Core ● 128-Bit SIMD + AVX256 & AVX512-S ● SMT
2C/2T @ 4.8GHz for GAME

2 "System Cores":
Zen 6lp ● 256KB L2 Per Core ● 128-Bit SIMD ● SMT
2C/4T @ 3.0GHz for OS

Unified 12 Core CCX ● SmartShift ● No On-Die L3

48MB CPU L3 via 3D V-Cache (Low-Yield Generic AMD 64MB Die)

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Even well-threaded games tend to use 1-2 main saturated threads that handle the bulk of the game logic, then delegate more parallelizable tasks out to the other cores that rarely get close to full utilisation.

With consoles focused on efficiency, it may make sense knowing that this is a given to have only a limited amount of full cores with deleted SMT, crankable clocks, more cache and extended instruction logic which "run the show" (some AVX capability could also make any prospective PS3 BC more viable), then have a bunch of smaller compact cores with less cache, reduced instruction logic, SMT and lower clock capabilities that are fundamentally geared towards being "workers"; handling tasks which can be more easily chopped up. In addition, use Zen low power cores for the OS. Finally, given you'd wanna get the die as small as possible, drop L3 off the die entirely and use the low-yield cast offs from AMD's mass-produced, generic V-cache dies instead.

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No chatgpt used in this post..

..unless you think it's a shit idea, then let's say I did; and offload the blame.
 
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On the subject the HD generation ditched out of order instructions because it was not cost effective. The better you make a chip the more is going to take in yields. Although some people are chanting victory because MS is going to smash prices with 900€$ hardware that actually should cost 1.000€$ this is a market of people rising an eyebrow every time something crosses the 299 price tag. Ready with their keyboards already on fire. If, if, the advantages outclass the space in silicon, like with AI cores for machine learning, it's implemented. If not:
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Out with it!


Six-core Zen 2 performance from a defective PS5 APU is close to Ryzen 5 2600x (six-core Zen 1.5 with quad 128-bit FPU pipelines for each CPU core).

PS5 Zen 2's 256-bit AVX2 throughput is similar to desktop Zen 1.x.
 
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AMD ZEN 6 Hybrid Concept for PS6:

8 "Worker Cores":
Zen 6c ● 512KB L2 Per Core ● 128-Bit SIMD ● SMT
7C/14T @ 4.0GHz for GAME
1C/1T Disabled for Yield

2 "Showrunner Cores":
Zen 6 ● 1MB L2 Per Core ● 128-Bit SIMD + AVX256 & AVX512-S ● SMT
2C/2T @ 4.8GHz for GAME

2 "System Cores":
Zen 6lp ● 256KB L2 Per Core ● 128-Bit SIMD ● SMT
2C/4T @ 3.0GHz for OS

Unified 12 Core CCX ● SmartShift ● No On-Die L3

48MB CPU L3 via 3D V-Cache (Low-Yield Generic AMD 64MB Die)

---

Even well-threaded games tend to use 1-2 main saturated threads that handle the bulk of the game logic, then delegate more parallelizable tasks out to the other cores that rarely get close to full utilisation.

With consoles focused on efficiency, it may make sense knowing that this is a given to have only a limited amount of full cores with deleted SMT, crankable clocks, more cache and extended instruction logic which "run the show" (some AVX capability could also make any prospective PS3 BC more viable), then have a bunch of smaller compact cores with less cache, reduced instruction logic, SMT and lower clock capabilities that are fundamentally geared towards being "workers"; handling tasks which can be more easily chopped up. In addition, use Zen low power cores for the OS. Finally, given you'd wanna get the die as small as possible, drop L3 off the die entirely and use the low-yield cast offs from AMD's mass-produced, generic V-cache dies instead.

---

No chatgpt used in this post..

..unless you think it's a shit idea, then let's say I did; and offload the blame.
Strix Point's Zen 5c has Zen 4's 256-bit SIMD layout.
 

Six-core Zen 2 performance from a defective PS5 APU is close to Ryzen 5 2600x (six-core Zen 1.5 with quad 128-bit FPU pipelines for each CPU core).

PS5 Zen 2's 256-bit AVX2 throughput is similar to desktop Zen 1.x.
Well. That's my point. Silicon is measured to the atom since you're going to sell 100 mill+ of these things every dollar saved is a massive difference. Consoles are not a boutique market.
 
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