I just realised there's some obvious information in the table above = a 300mm diameter wafer is 70,000 mm2 , and the price given is ~$10,000 per wafer .. so that gives a cost per mm2 of $0.14
$14 for 100mm2, $28 for 200mm2, $42 for 300mm2, $56 for 400mm2 - interesting figures if correct
[edit - the above figures include bad chips with defects - see below for yields]
Note the other table data seems to be based on a die size of ~128mm2 with a yield of 76% (price +33% per chip)
... -at ~400mm2 that yield would be expected to extrapolate to ~43% giving an additional cost per die increase of 1.75x . However elsewhere yields have been stated to be ~85% - assuming the same die size that extrapolates to a lower cost increase at 400mm2 of 1.38x
[edit2] my calculated APU BOMs are therefor : $42 200mm2 ; $80 300mm2 ; $132 400mm2 (I think initial PS4 APU costs were ~$100 and initial PS3 Cell+RSX costs were $200+ ! )
I think you're assuming that every mm2 of a wafer is usable. It's not. There will be free space on the wafer that can only partially fit a complete die.
For a 400mm2 die you're assuming 70,000 / 400 = 175 dies per wafer. With a wafer cost of $10,000.... $10,000 / 175 = $57.14 per die
You're going to be getting less than that because all the free space can't be grouped, you will have partials that are unusable for a full die.
For a 300mm diameter wafer and 400mm2 die, it's probably going to look more like this:
Best case 137 dies per wafer (100% yield), $10,000 / 137 = $72.99 per die
Worst case 116 dies per wafer (85% yield), $10,000 / 116 = $86.21 per die
A defect density of 0.0412 / sq cm gives you 85% yield.
But the the actual yield is likely to be higher than 85% with the same defect density.
This is because CUs cover most of the die area and we have some redundancy (disabling 1 CU pair in each shader engine) to allow for defects. Dies with faults outside of the CUs will not be usable though.