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Next-Gen PS5 & XSX |OT| Console tEch threaD

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Shin

Banned
Plus both ram and ssd are set to go up in price, unless of course they already had set price.
That doesn't sound right and what's out there.
It's supposed to go down because suppliers have been sitting on unsold stocks, plus the fine for the big players.
 

THE:MILKMAN

Member
N7+ had the same yield as N7 after 2 quarters. Products built on N7+ are shipping to consumers and it is being used to manufacture mobile SoCs and will have plenty of capacity for consoles.

It is already a mature production ready node.

Isn't it a vastly different prospect going from a 5W/~90mm2 mobile SoC to a ~150W 300-400mm2 console SoC?
 

R600

Banned
7nm EUV requires chip redesign and that costs, alot.

Zen3 and RDNA2 is made for EUV, so look for these chips on this node.

Consoles were locked since almost a year ago. PS5 V dev kits went out in June, there is no way consoles are using 7nm EUV.

They WILL be using TSMCs N7P node, which is 2nd gen 7nm node with 10% better TDP at same clocks without requiring chip redesign.
 

Marlenus

Member
Isn't it a vastly different prospect going from a 5W/~90mm2 mobile SoC to a ~150W 300-400mm2 console SoC?

Not really. Thermal density might be an issue but low clocks help (another reason I think 2Ghz in a console is just wishful thinking). Size will obviously impact yield but Sony and MS will have done the sums on what works for their desired target retail price.
 

Gamernyc78

Banned
It's just a feeling, all the recent Sony's declarations (8k, we want to do a premium product, we need to change, zero loading times, and so on) make me think we are about to see something really unexpected and wow

OH it's happening I'm just waiting in the cut with a few names on a list to say "what's tht nonsense you were saying" 😂 😂 😂
 

henau212

Neo Member
N7+ had the same yield as N7 after 2 quarters. Products built on N7+ are shipping to consumers and it is being used to manufacture mobile SoCs and will have plenty of capacity for consoles.

It is already a mature production ready node.
The Snapdragon 965 just released on N7P because of limited volume in N7+. That does not really Support your case. And that chip is not shipping in volume right now...
 

MadAnon

Member
N7+ had the same yield as N7 after 2 quarters. Products built on N7+ are shipping to consumers and it is being used to manufacture mobile SoCs and will have plenty of capacity for consoles.

It is already a mature production ready node.
How do you know it will have plenty of capacity when it's clearly being reserved by companies with high/higher margin products? That's why Apple is also the priority costumer when it comes to new nodes. You do know that Nvidia will also use TSCM to produce bulk of their next gen Ampere chips?
 
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Marlenus

Member
7nm EUV requires chip redesign and that costs, alot.

Zen3 and RDNA2 is made for EUV, so look for these chips on this node.

Consoles were locked since almost a year ago. PS5 V dev kits went out in June, there is no way consoles are using 7nm EUV.

They WILL be using TSMCs N7P node, which is 2nd gen 7nm node with 10% better TDP at same clocks without requiring chip redesign.

Dev kits don't need the exact same hardware as the end console. They can use a facsimile so a zen2 CPU + 5700xt would be totally viable.

The SoCs are custom designs so the money needs to be spent to design them weather they are designed for the N7/N7P or for N7+.

N7+'s reduced use of multi-patterning makes it easier to bring costs down going forward Vs N7/N7P so an upfront cost that needs to be borne anyway to give you lower oncosts due to higher density and potentially cheaper wafer costs makes perfect sense since the yields is there and the capacity has been ramping for a while.
 

xool

Member
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Dude you're supposed to post outside the quote. oh whatever.

ok need more clue
 
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xool

Member
How do you know it will have plenty of capacity when it's clearly being reserved by companies with high/higher margin products? That's why Apple is also the priority costumer when it comes to new nodes. You do know that Nvidia will also use TSCM to produce bulk of their next gen Ampere chips?
High margins is a fair point, but PS4 sold 100m APUs in ~5 years - that's a big customer too. There not going to be sitting at the little table.
 

Disco_

Member
Yeah but what if Gonzalo and the others are from a scrapped or old design and Prospero has the real numbers? Also didn't Apisak say that AMD were posting incorrect information to throw people off?
Gonzalo was tested as recently as august pr september, maybe even later. If we believe AquariusZ or whatever his name is, he himself is very surprised that oberon is still undergoing testing if it's supposed to launch next november.

I'm one of the few that does believe there is some merit to the ps5 originally being scheduled for 2019. NAVI being a year late is probably the reason the change to 2020 happened. If you look at amd slides from 2015/2016, navi is listed as a 2018 release. but it ended up coming in july 2019. If the rumor of the 2019 plan being scrapped in 2017 is true, does that give sony enough time and incentive to scrap the chip design they've poured millions into or do they try to wring out as much power as possible out of what they've been working on? The fact they've steadily upped the quality of memory chips from ariel to oberon could mean that is what they're trying to do. Increase bandwidth to make up some of the perceived lack in power. In 2017 the chip would've been a year away from being finalized for a 2019 release.

Apisak did say that that fake code names have popped up, sure, but there's nothing to show just how far back that deception started. We do know that AMD code name decoder changed with zen 2 IIRC. So it could go as far back as that.

This is all speculation of course. Just saying what makes sense to my ignorant little mind.

That doesn't sound right and what's out there.
It's supposed to go down because suppliers have been sitting on unsold stocks, plus the fine for the big players.
Prices are going up as early as this quarter for NAND/ssds. The demand for consoles is probably a part of the reason.

 

THE:MILKMAN

Member
Not really. Thermal density might be an issue but low clocks help (another reason I think 2Ghz in a console is just wishful thinking). Size will obviously impact yield but Sony and MS will have done the sums on what works for their desired target retail price.

OK, but that still leaves MadAnon's point about process node maturity and HVM that console chips need. It just seems unlikely console SoCs (in 2-3 million/month qty between XSX/PS5) would be the very first big/>300mm2 chips to be made in massive numbers on EUV.
 

R600

Banned
Dev kits don't need the exact same hardware as the end console. They can use a facsimile so a zen2 CPU + 5700xt would be totally viable.

The SoCs are custom designs so the money needs to be spent to design them weather they are designed for the N7/N7P or for N7+.

N7+'s reduced use of multi-patterning makes it easier to bring costs down going forward Vs N7/N7P so an upfront cost that needs to be borne anyway to give you lower oncosts due to higher density and potentially cheaper wafer costs makes perfect sense since the yields is there and the capacity has been ramping for a while.
Its redesign thats the issue. Dev kit they sent out (V style) will almost certainly not have PC chips inside (they had these before Wired article - "big silver tower").

N7P is compatibile with actual chip design, it provides 10% less TDP for same clocks. It does not require redesign and its not used up by hogh margin players. Everything points to 7nm Performance node to be used tbh
 

xool

Member
You know 9+TF is not a bad generational increase, if your baseline is 1.8TF PS4 .. even better if you've got a 1.3/1.4 TF XONE .. add RDNA on top and the numbers looks good.

..or would, if 4k wasn't stealing our lunch.

I wonder if people stuck on 1080p monitors will get better perf., or just free antialiasing ??
 

Disco_

Member
How do you know it will have plenty of capacity when it's clearly being reserved by companies with high/higher margin products? That's why Apple is also the priority costumer when it comes to new nodes. You do know that Nvidia will also use TSCM to produce bulk of their next gen Ampere chips?
Apple is skipping 7nm+, likley due to yields, and going straight to 5nm. 7nm and 7nm+ are not compatible nodes. Because of this, AMD will become TSMC's largest 7nm partner.
Not sure if it was confirmed but isn't NVIDIA going to 7nm+ and skipping 7nm? How else would those 50% ipc and 50% power reduction claims make sense.
 

R600

Banned
Gonzalo was tested as recently as august pr september, maybe even later. If we believe AquariusZ or whatever his name is, he himself is very surprised that oberon is still undergoing testing if it's supposed to launch next november.

I'm one of the few that does believe there is some merit to the ps5 originally being scheduled for 2019. NAVI being a year late is probably the reason the change to 2020 happened. If you look at amd slides from 2015/2016, navi is listed as a 2018 release. but it ended up coming in july 2019. If the rumor of the 2019 plan being scrapped in 2017 is true, does that give sony enough time and incentive to scrap the chip design they've poured millions into or do they try to wring out as much power as possible out of what they've been working on? The fact they've steadily upped the quality of memory chips from ariel to oberon could mean that is what they're trying to do. Increase bandwidth to make up some of the perceived lack in power. In 2017 the chip would've been a year away from being finalized for a 2019 release.

Apisak did say that that fake code names have popped up, sure, but there's nothing to show just how far back that deception started. We do know that AMD code name decoder changed with zen 2 IIRC. So it could go as far back as that.

This is all speculation of course. Just saying what makes sense to my ignorant little mind.


Prices are going up as early as this quarter for NAND/ssds. The demand for consoles is probably a part of the reason.

Gonzalo was benchmarked 6 months ago, when dev kits were sent out. If they cancelled it in 2017 there wouldnt be APU physically existing, whats the point? Scrapped plans in 2017 still point at no chip being made for at very least a year.

In any case, 14Gbps chips (448GB/s) were always too low for ~5700XT equivalent with RT and Zen2 on board. They most likely started with 14Gbps back in late 2018 and changed it to final 18Gbps when V dev kits were sent out, Gonzalo benchmark popped out and PCB dev kit leaked (May 21).

My opinion on AquariusZi "Oberon another respin" is 316mm² chip running at 2.0GHz. And if ever PS5 was suppose to come out in 2019, chip was never running at 2.0GHz so perhaps Sony pushed it further for additional 15% performance.

Because AquariusZi did mention Oberon being one size smaller then Arden (~50mm²). And we saw Scarlett die on E3 ~ 360mm².
 
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Gonzalo was tested as recently as august pr september, maybe even later. If we believe AquariusZ or whatever his name is, he himself is very surprised that oberon is still undergoing testing if it's supposed to launch next november.

I'm one of the few that does believe there is some merit to the ps5 originally being scheduled for 2019. NAVI being a year late is probably the reason the change to 2020 happened. If you look at amd slides from 2015/2016, navi is listed as a 2018 release. but it ended up coming in july 2019. If the rumor of the 2019 plan being scrapped in 2017 is true, does that give sony enough time and incentive to scrap the chip design they've poured millions into or do they try to wring out as much power as possible out of what they've been working on? The fact they've steadily upped the quality of memory chips from ariel to oberon could mean that is what they're trying to do. Increase bandwidth to make up some of the perceived lack in power. In 2017 the chip would've been a year away from being finalized for a 2019 release.

Apisak did say that that fake code names have popped up, sure, but there's nothing to show just how far back that deception started. We do know that AMD code name decoder changed with zen 2 IIRC. So it could go as far back as that.

This is all speculation of course. Just saying what makes sense to my ignorant little mind.


Prices are going up as early as this quarter for NAND/ssds. The demand for consoles is probably a part of the reason.

Uh oh. That's not good. 599$ consoles confirmed.
 
You know 9+TF is not a bad generational increase, if your baseline is 1.8TF PS4 .. even better if you've got a 1.3/1.4 TF XONE .. add RDNA on top and the numbers looks good.

..or would, if 4k wasn't stealing our lunch.

I wonder if people stuck on 1080p monitors will get better perf., or just free antialiasing ??

An interesting question, whether or not we'll still get performance modes at 1080p, even those with 4k screens may opt for up-scaling and better performance on some titles (given the choice).

The thing about TF-Gate, is that assuming both boxes are easy to max out, which appears to be the case so far. A 10-15, even a 20% performance swing isn't going to make as much a difference as people think (just look at the PC benchmarks for parts on the same architecture separated by performance gaps of this size). It's not something that is going to make or break either of these boxes. It would take more than that. The reason why PS4 and Xbone are so distant isn't just the GPU but the bandwidth, while xbone can achieve quite a bit with 1st party development, third parties have gotten lazier and lazier with ports. Often barely utilizing the esram and just using the limited bandwidth of the ddr3.

That's why TF-Gate and CU-Gate just don't interest me that much.
 

vpance

Member
You know 9+TF is not a bad generational increase, if your baseline is 1.8TF PS4 .. even better if you've got a 1.3/1.4 TF XONE .. add RDNA on top and the numbers looks good.

..or would, if 4k wasn't stealing our lunch.

I wonder if people stuck on 1080p monitors will get better perf., or just free antialiasing ??

Also have to factor in VRS and SSD. It's not bad, it's just that they can do much better than that by the end of 2020, which they will.
 

Marlenus

Member
Its redesign thats the issue. Dev kit they sent out (V style) will almost certainly not have PC chips inside (they had these before Wired article - "big silver tower").

N7P is compatibile with actual chip design, it provides 10% less TDP for same clocks. It does not require redesign and its not used up by hogh margin players. Everything points to 7nm Performance node to be used tbh

If console SoCs were developed on N7+ from the start there is no redesign and they are custom designs so they can't just pick parts off the shelf.

The other aspect is die size. On N7P a 56 CU design will be around 400mm². With the announced defect rate of 0.09/cm² that means that you get 97 good dies and 40 defective ones. N7+ has the same yield as N7 according to Anandtech so that means for the same SoC at the low end of the 15-20% density increase is going to be getting 111 good dies and 40 defective ones.

That is 15% more good dies from a node that is just as cheap per wafer because there are fewer multi-patterning steps which is an expensive process. As it is a simpler process it is likely that as more capacity comes online it can actually start to cost less per wafer than N7 and N7P.

Does that mean it definitely will be N7+, of course not but if both the 56CU and 350mm² rumours are true I don't see layout optimisation and other changes accounting for 50mm² of die area. I also don't see it having anything less than a 384bit bus as that easily allows for 24GB of unified ram.

N7+ just makes the most sense to me as it is properly ramping up at just the right time.
 

R600

Banned
If console SoCs were developed on N7+ from the start there is no redesign and they are custom designs so they can't just pick parts off the shelf.

The other aspect is die size. On N7P a 56 CU design will be around 400mm². With the announced defect rate of 0.09/cm² that means that you get 97 good dies and 40 defective ones. N7+ has the same yield as N7 according to Anandtech so that means for the same SoC at the low end of the 15-20% density increase is going to be getting 111 good dies and 40 defective ones.

That is 15% more good dies from a node that is just as cheap per wafer because there are fewer multi-patterning steps which is an expensive process. As it is a simpler process it is likely that as more capacity comes online it can actually start to cost less per wafer than N7 and N7P.

Does that mean it definitely will be N7+, of course not but if both the 56CU and 350mm² rumours are true I don't see layout optimisation and other changes accounting for 50mm² of die area. I also don't see it having anything less than a 384bit bus as that easily allows for 24GB of unified ram.

N7+ just makes the most sense to me as it is properly ramping up at just the right time.
Nah, 56CU GPU is nowhere near 400mm².

Zen2 with 1/4th of L3 cache that will be in console is less then 40mm².

40CU Navi 10 with 256bit bus is 251mm².

56CU APU will not have additional 32ROPs, so you are looking tops 370mm² for APU.
 
Nah, 56CU GPU is nowhere near 400mm².

Zen2 with 1/4th of L3 cache that will be in console is less then 40mm².

40CU Navi 10 with 256bit bus is 251mm².

56CU APU will not have additional 32ROPs, so you are looking tops 370mm² for APU.
My bet for these consoles have always been 48-56CUs.

Probably 48 or 52 for PS5 and 56 for XSX. I'm also thinking that the PS5 will have larger RAM.
 
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SlimySnake

Flashless at the Golden Globes
I don't see 2GHz being possible in a console thermal and power envelope.
it really depends on what kind of performance improvements we get from n7p and revisions to rdna 1. we should have a year of revisions, arch improvements, thermal efficiencies on the same node. we saw this with gcn revisions year to year. take a look at the polaris 400 and 500 series.

IF they go with n7p instead of 7nm+, they should get another 7% in thermal efficiency. the max efficiency for the 5700xt seems to be 1.7 ghz according to several tests. anything after that is a disproportional increase in tdp compared to performance. that 1.7 ghz is only going to increase next year and n7p should allow them to push it higher to 2.0 ghz. if ms is sticking with 56 cu at 1.7 ghz to get to 12 tflops then sony should be able to clock it higher with the same tdp budget assuming those efficiencies do come to fruition.

the x1x was 7 billion transistors at 16nm, going to 7nm or 7np shouldve allowed them to easily hit 15 billion transistors AND increase clocks by 40%. if sony is going with a 46 cu gpu they should come in around 12-13 billion transistors allowing them to push clocks much higher because of the smaller size. remember zen 2 is only 2 billion transistors and 1/4 cache cuts down the size by almost half.
 
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SlimySnake

Flashless at the Golden Globes
You know 9+TF is not a bad generational increase, if your baseline is 1.8TF PS4 .. even better if you've got a 1.3/1.4 TF XONE .. add RDNA on top and the numbers looks good.

..or would, if 4k wasn't stealing our lunch.

I wonder if people stuck on 1080p monitors will get better perf., or just free antialiasing ??
4k isnt the only problem. sony devs will be forced to use 4kcb and thats ok. the problem is all the extra stuff that the cpu will allow. destruction, changes in geometry, cg quality visual effects, ray tracing, an unprecedented levels of interactivity will all require the gpu to render everything. yes, 9 tflops is good for running current gen games, but next gen games will be far more complex in the graphical department and a 9 tflops baseline will hurt both the ps5 and the xbox series x.

games on the xbox still look phenomenal. if you believe rdr2 is the best looking game this gen, it runs at identical settings as the ps4 on the x1 albeit at 900p. games still look fantastic on the x1, just a tad blurry. so yeah, its not the end of the world, but then again the 1.3 tflops x1 isnt the end of the world either. its a just a massive disappointment that held back an entire gen.
 

Marlenus

Member
Nah, 56CU GPU is nowhere near 400mm².

Zen2 with 1/4th of L3 cache that will be in console is less then 40mm².

40CU Navi 10 with 256bit bus is 251mm².

56CU APU will not have additional 32ROPs, so you are looking tops 370mm² for APU.

Agreed with 40mm² for zen2 on N7.

Navi 10 is 93mm² bigger than 14. Looking at the die shots 32 Rops are about the same size as 3CUs. So swap rops for CUs and that 93mm covers 19CUs, 8 pcie 4 lanes and 128bits of memory bus Call it 20CUs + 128 bits for 93mm² and you have 251 + ~40 + ~93 for 384mm² before factoring in ray tracing and internal traces for gpu-cpu communication. 400mm² seems like the ballpark to me.
 

R600

Banned
Agreed with 40mm² for zen2 on N7.

Navi 10 is 93mm² bigger than 14. Looking at the die shots 32 Rops are about the same size as 3CUs. So swap rops for CUs and that 93mm covers 19CUs, 8 pcie 4 lanes and 128bits of memory bus Call it 20CUs + 128 bits for 93mm² and you have 251 + ~40 + ~93 for 384mm² before factoring in ray tracing and internal traces for gpu-cpu communication. 400mm² seems like the ballpark to me.
I have all dimensions for Navi 10.

20CU cluster is 43mm²
64bit bus additional - 16mm² (256+64 = 320bit bus)

251mm² + 35mm² + 43mm²(20CU) + 16mm² = 345mm²

RT in RTX is meesly ~8% of CU core so tops ~12mm².

They can get it under 370mm² for sure.
 

Marlenus

Member
it really depends on what kind of performance improvements we get from n7p and revisions to rdna 1. we should have a year of revisions, arch improvements, thermal efficiencies on the same node. we saw this with gcn revisions year to year. take a look at the polaris 400 and 500 series.

IF they go with n7p instead of 7nm+, they should get another 7% in thermal efficiency. the max efficiency for the 5700xt seems to be 1.7 ghz according to several tests. anything after that is a disproportional increase in tdp compared to performance. that 1.7 ghz is only going to increase next year and n7p should allow them to push it higher to 2.0 ghz. if ms is sticking with 56 cu at 1.7 ghz to get to 12 tflops then sony should be able to clock it higher with the same tdp budget assuming those efficiencies do come to fruition.

the x1x was 7 billion transistors at 16nm, going to 7nm or 7np shouldve allowed them to easily hit 15 billion transistors AND increase clocks by 40%. if sony is going with a 46 cu gpu they should come in around 12-13 billion transistors allowing them to push clocks much higher because of the smaller size. remember zen 2 is only 2 billion transistors and 1/4 cache cuts down the size by almost half.

Zen2 is 3.9B transistors for 8 cores and 32MB l3.
 
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N7+ had the same yield as N7 after 2 quarters. Products built on N7+ are shipping to consumers and it is being used to manufacture mobile SoCs and will have plenty of capacity for consoles.

It is already a mature production ready node.
No it's not. It's progressing the same as N7. There is a huge difference between having the same maturity and being on a similar maturation tragectory. There is no way N7+ has defect densities as low as 0.07/cm2. It only recently went into volume production.

There is also the fact that wafer supply for N7+ is lower than N7 - because it's a newer node. Each of those wafers are gonna be very expensive and AMD will want to use as much of those wafers as they can on Milan. Whatever is left will go to Ryzen and later Threadripper, because they leverage the same chiplet design. What's left will probably go to desktop GPU.
Then after all that, will consoles be considered.
Why? Because Epyc (and Radeon Instinct) has the highest margins. Then comes Threadripper. Then comes Ryzen. Then comes Radeon (though it seems AMD is following suit with Nvidia in keeping prices high).

Consoles have the lowest margin of all the chips they sell. AMD are no longer back in 2012, reeling from the devastatingly bad Bulldozer, and the underwhelming Tahiti. They're not as desperate for console volume, because they are making money in desktop and they're making money in datacenter. They're having difficulty meeting demand in fact.

It is for that reason that I seriously doubt either console will be N7+. At best N7P because it uses the same design rules as N7 and won't need brand new photomasks.

I mean maybe AMD have given N7+ wafers to Microsoft and/or s
Sony, but you can bet your ass they're going to be paying for them, cause AMD want their gross margin to be on the up. They are a publicly held business after all. They don't operate for the benefit of gamers.
It's possible, but unrealistic.
 

Marlenus

Member
I have all dimensions for Navi 10.

20CU cluster is 43mm²
64bit bus additional - 16mm² (256+64 = 320bit bus)

251mm² + 35mm² + 43mm²(20CU) + 16mm² = 345mm²

RT in RTX is meesly ~8% of CU core so tops ~12mm².

They can get it under 370mm² for sure.

Well the 1st question is can 1 shader engine support 15 wgps? The max we have seen is 12 in navi14 but only 11 are active in the 5500xt.

If not it means we need 3 engines for 60CUs and that is 225mm² with all 96 ROPs and no ray tracing.

370mm² is only doable if a shader engine can support 15 wgps otherwise it will be closer to 400mm².
 
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