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Next-Gen PS5 & XSX |OT| Console tEch threaD

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I am speculating the following for PS5:

36 compute units @ 2 Ghz for backwards compatibility mode with boost in graphics for PS4 games (possibly PS3-PS1) such as: Checkerboard 4K to Native 4K

36 compute units plus activation of additional 36 units to play PS5 games.
 

Reindeer

Member
I am speculating the following for PS5:

36 compute units @ 2 Ghz for backwards compatibility mode with boost in graphics for PS4 games (possibly PS3-PS1) such as: Checkerboard 4K to Native 4K

36 compute units plus activation of additional 36 units to play PS5 games.
It's not happening, don't even entertain that idea that's born out of desperation and fantasy of some of the people here.
 

Lone Wolf

Member
Μaybe i am on meds maybe not ,but at least unlike you, i don't falsify prescriptions to get suppositories like you do
Get it?
Or you are off your suppositories and you need something else to calm down?
Dude my suppository prescription is totally legit.
 

Nickolaidas

Member
I am speculating the following for PS5:

36 compute units @ 2 Ghz for backwards compatibility mode with boost in graphics for PS4 games (possibly PS3-PS1) such as: Checkerboard 4K to Native 4K

36 compute units plus activation of additional 36 units to play PS5 games.
That ... doesn't sound like a console slightly more powerful than the series x. It sounds like a fucking power plant.

Though truth be told, the V design of the dev kit does entertain that speculation.

36cu's on each side. But it's bull.
 

STEaMkb

Member
Now it makes sense. Wondered why all the xbox drive-bys went unnoticed while ps people were handed out warnings left and right.

I'm not sure how they managed to pull it off but they have successfully stuffed the Era moderation team with Xbox Ambassadors. After one is promoted they start nominating and recommending their friends to the moderation team I suppose.

Ghostcrew for the record is not an Xbox Ambassador but his promotion remains a puzzle to many because he was notorious for anti-Sony baiting and had numerous infractions to his name. Then one month he suddenly starts acting overtly pro Sony. A few of us joked that his account had been hijacked because it was most unusual behaviour. The reason became clear after he was promoted to the moderation team. His buddies must have nominated him and so he adopted an overt stance of neutrality while privately he issues warnings and bans to PlayStation enthusiastic forum members, all the time ignoring similar infractions on the other side.

Era is just a pretence. More and more people are beginning to see it.
 
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It's not happening, don't even entertain that idea that's born out of desperation and fantasy of some of the people here.
That ... doesn't sound like a console slightly more powerful than the series x. It sounds like a fucking power plant.

Though truth be told, the V design of the dev kit does entertain that speculation.

36cu's on each side. But it's bull.

What does dual 36 Compute Unit mean?
 

Marlenus

Member
That's fine I guess. But isn't there some information out there implying that the PS5 is somewhere around 316mm2. If I recall correctly, its the one with the detailed memory configuration leaks (overkill VRM, the chip layout etc.).
Regardless, ~300mm2 for PS5 and ~350mm2 for XSX is the window. That's not a lot of room to play with. The APU by my estimations should be closer to 400mm2. I don't see how 350mm2 is enough for 56CU with RT hardware and the 8 Zen2 cores.

No, he's been saying that Oberon is a newer version of Ariel. He's been saying they're the same fundamental design, but at different stages of completeness. Ariel was the first prototype and then Oberon is a revised and slightly improved prototype.
They're is no evidence to suggest that the PS5 will use two GPUs.
Just because there are two codenames, doesn't mean that both chips are going to be used in the same machine. That is faulty logic.

Navi 10 is 251mm². Navi 14 is 158mm².

The additional 93mm² gets you 16CUs, 128bit memory bus, 32 rops and 8 pcie 4 lanes and an extra compute engine.

Drop those 8 pcie lanes and 32 rops and you could get a 60CU, 64 rop, 384bit, 3CE config in 344mm². This GPU would have around 14.1B transistors so add in 5% of the total for RT and you are at 14.8B transistors for a total die size on N7 of 361mm².

Zen2 has around 3.9B but is more dense because a lot of it is l3 cache. So has 52 transistors per mm². It seems Renoir is going from 32MB l3 per 8 cores to 8MB and I suspect the same is true for the consoles as the extra L3 on zen2 is to help mitigate the latency from the IO die. Since the memory controller is on die for the console SoCs not as much is needed. It would mean the die size for the CPU in the SoC is around 40mm² in N7.

That puts the total APU size to 401mm² on plain old N7 without any layout optimisation. It also means the CPU portion will use around 2.1B transistors (estimated using 41M trans / mm² for the logic giving around 1.5B transistors for zen2 cores and 2.4B for the cache which I divided by 4 for the APU).

That totals around 17.2B transistors for the entire SoC in 401mm² giving a density of 43M trans/mm².

N7+ has a 15%-20% increase in transistor density over N7 meaning that this SoC on that node would be around 50M trans/mm² and a die size of approx 344mm².

This would fit with last gen and would work with a $499 price point IMO. It also seems like the best use of the currently available tech to balance power consumption, memory amount and peak performance Vs other designs like 36CUs at a stupidly high clockspeed.

The other thing is how do we know that Ariel and oberon are PS5 and not something for Apple? It is not like Sony and MS are AMDs only semi custom clients.
 

Reindeer

Member
Navi 10 is 251mm². Navi 14 is 158mm².

The additional 93mm² gets you 16CUs, 128bit memory bus, 32 rops and 8 pcie 4 lanes and an extra compute engine.

Drop those 8 pcie lanes and 32 rops and you could get a 60CU, 64 rop, 384bit, 3CE config in 344mm². This GPU would have around 14.1B transistors so add in 5% of the total for RT and you are at 14.8B transistors for a total die size on N7 of 361mm².

Zen2 has around 3.9B but is more dense because a lot of it is l3 cache. So has 52 transistors per mm². It seems Renoir is going from 32MB l3 per 8 cores to 8MB and I suspect the same is true for the consoles as the extra L3 on zen2 is to help mitigate the latency from the IO die. Since the memory controller is on die for the console SoCs not as much is needed. It would mean the die size for the CPU in the SoC is around 40mm² in N7.

That puts the total APU size to 401mm² on plain old N7 without any layout optimisation. It also means the CPU portion will use around 2.1B transistors (estimated using 41M trans / mm² for the logic giving around 1.5B transistors for zen2 cores and 2.4B for the cache which I divided by 4 for the APU).

That totals around 17.2B transistors for the entire SoC in 401mm² giving a density of 43M trans/mm².

N7+ has a 15%-20% increase in transistor density over N7 meaning that this SoC on that node would be around 50M trans/mm² and a die size of approx 344mm².

This would fit with last gen and would work with a $499 price point IMO. It also seems like the best use of the currently available tech to balance power consumption, memory amount and peak performance Vs other designs like 36CUs at a stupidly high clockspeed.

The other thing is how do we know that Ariel and oberon are PS5 and not something for Apple? It is not like Sony and MS are AMDs only semi custom clients.
Apple do not do BC with PS4 and PS4 Pro.
 

Disco_

Member
Komachi note in a second tweet that think Navi21 get 3 months delay because is still in A0 revision so estimate around Semtember
Komachi also said navi21/22/23 so not support "big apu mode". Whether that means they can't be made into console apus, I'm not sure. But if navi2x is >500mm as rumored, yeah, it's probably a no go for consoles.
 
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MadAnon

Member
I doubt any console will be 399. Inflation exists and this time they are not delivering underpowered, outdated hardware as it was with PS4/Xbox One. SSD alone is an expensive upgrade over some run of the mill HDD.
 
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Reindeer

Member
I doubt any console will be 399. Inflation exists and this time they are not delivering underpowered, outdated hardware as it was with PS4/Xbox One. SSD alone is an expensive upgrade over some run of the mill HDD.
Plus both ram and ssd are set to go up in price, unless of course they already had set price.
 

sinnergy

Member
I am speculating the following for PS5:

36 compute units @ 2 Ghz for backwards compatibility mode with boost in graphics for PS4 games (possibly PS3-PS1) such as: Checkerboard 4K to Native 4K

36 compute units plus activation of additional 36 units to play PS5 games.

72 is absolutely not possible...
 

Marlenus

Member
That's fine I guess. But isn't there some information out there implying that the PS5 is somewhere around 316mm2. If I recall correctly, its the one with the detailed memory configuration leaks (overkill VRM, the chip layout etc.).
Regardless, ~300mm2 for PS5 and ~350mm2 for XSX is the window. That's not a lot of room to play with. The APU by my estimations should be closer to 400mm2. I don't see how 350mm2 is enough for 56CU with RT hardware and the 8 Zen2 cores.


No, he's been saying that Oberon is a newer version of Ariel. He's been saying they're the same fundamental design, but at different stages of completeness. Ariel was the first prototype and then Oberon is a revised and slightly improved prototype.
They're is no evidence to suggest that the PS5 will use two GPUs.
Just because there are two codenames, doesn't mean that both chips are going to be used in the same machine. That is faulty logic.

Sorry to quote this again but if 316mm² is correct for PS5 and it has the same zen2 with 8MB l3 then it means that the GPU portion is around 13.6B transistors which is 30% larger than Navi 10. Seems unlikely that that none of those transistors are used for additional CUs with that much space to play with.

OTOH a 36CU design with the same extra 5% of GPU transistors added for RT gives a SoC size of around 260mm² on N7+. That would give Sony a pricing advantage but I really doubt that you can clock a 36CU design to 2GHz in a console power and thermal envelope.
 
72 is absolutely not possible...

gPZxdZ7.gif
 

MadAnon

Member
Sorry to quote this again but if 316mm² is correct for PS5 and it has the same zen2 with 8MB l3 then it means that the GPU portion is around 13.6B transistors which is 30% larger than Navi 10. Seems unlikely that that none of those transistors are used for additional CUs with that much space to play with.

OTOH a 36CU design with the same extra 5% of GPU transistors added for RT gives a SoC size of around 260mm² on N7+. That would give Sony a pricing advantage but I really doubt that you can clock a 36CU design to 2GHz in a console power and thermal envelope.
7nm EUV isn't happening. It's mostly taken by high margin products.
 
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Marlenus

Member
7nm EUV isn't happening. Limited production for high margin products.

AMD have finished designing zen3 on N7+ and are building RDNA2 on N7+. They are experienced with the design libraries Sony/MS can leverage that experience.

Besides N7+ already has the same yields as N7 and it is being used for some mobile SoCs like the Kirin 990 5g.

With zen3 on N7+ it is not going to be limited production.
 
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MadAnon

Member
AMD have finished designing zen3 on N7+ and are building RDNA2 on N7+. They are experienced with the design libraries and if Sony/MS can leverage that experience.

Besides N7+ already has the same yields as N7 and it is being used for some mobile SoCs like the Kirin 990 5g.

With zen3 on N7+ it is not going to be limited production.
You just named bunch of high margin products. Consoles ain't one.
 
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Hobbygaming

has been asked to post in 'Grounded' mode.
Really don't get the fascination with Ray tracing.....it makes most pcs slow and it only offers a really marginal visual upgrade
I think developers have become so good with rendering light, that the biggest benefit of raytracing is that it's much easier to use than creating baked lighting solutions so it'll save time
 

Hobbygaming

has been asked to post in 'Grounded' mode.
For example, PS4 had few APU codenames. We dont know if these were given to dev kits then retail chip specifically, or was there Sony/AMD specific usage, but I remember PS4 APU being called Liverpool, Thebe, Starsha.
Yep, for PS5 there's Ariel, Oberon, Gonzalo and Prospero. Has anyone seen any numbers for Prospero?
 
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Marlenus

Member
You literally just named bunch of high margin products. Consoles ain't one.

Zen3 is not high margin in all products. Sure the ones used in Milan will be but the desktop parts will range from high to low margin.

RDNA2 also won't be high margin in all products.
 

SlimySnake

Flashless at the Golden Globes
If we look at the shader processors in nvidia cards, the rtx 2080 only has 46 cu worth of shader processors. Or 2,944.

It typically runs at 1.95ghz on stock clocks. That's an 11.4 tflops gpu. If Sony is indeed going with 40 cu gpu at 2?0 ghz, i dont see why they can't invest an additional 20-25mm2 for 10 additional cus at 1.95 ghz.

A 1/4 cache zen 2 should be 40 mm2. Rt is likely 15 mm2. I/o and bus should be around 20 mm2. 40 cu 5700 is 251mm2 but it should have some pc specific hardware not needed for consoles. You can save 20mm2 there and use it for 8 extra cus. That brings us to 325mm2 on n7.

N7p is around 7% smaller or more power efficient. That's your 300 mm2 46 cu gpu at 2.0 ghz. 11.7 tflops.
 

MadAnon

Member
Zen3 is not high margin in all products. Sure the ones used in Milan will be but the desktop parts will range from high to low margin.

RDNA2 also won't be high margin in all products.
Mostly high margin. High end mobile chips, server CPUs, larger navi GPUs, desktop CPUs.
 
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Disco_

Member
GTX 1080 8.8TF have better perfomance than Vega 64 13 TF in games
Thank you again, my mistake
Let's also keep in mind nvidia and amd market their Tfs differently. AMD uses max theoretical boost in their specs while NVIDIA usually uses base clock. What we end up with is AMD cards that almost never reach said Tf rating and NVIDIA cards that are almost always way above it.


Era is just a pretence. More and more people are beginning to see it.
I've ventured outside the next gen thread a couple times. Will never do it again. It's scary.
 

Marlenus

Member
If we look at the shader processors in nvidia cards, the rtx 2080 only has 46 cu worth of shader processors. Or 2,944.

It typically runs at 1.95ghz on stock clocks. That's an 11.4 tflops gpu. If Sony is indeed going with 40 cu gpu at 2?0 ghz, i dont see why they can't invest an additional 20-25mm2 for 10 additional cus at 1.95 ghz.

A 1/4 cache zen 2 should be 40 mm2. Rt is likely 15 mm2. I/o and bus should be around 20 mm2. 40 cu 5700 is 251mm2 but it should have some pc specific hardware not needed for consoles. You can save 20mm2 there and use it for 8 extra cus. That brings us to 325mm2 on n7.

N7p is around 7% smaller or more power efficient. That's your 300 mm2 46 cu gpu at 2.0 ghz. 11.7 tflops.

I don't see 2GHz being possible in a console thermal and power envelope.
 

MadAnon

Member
Desktop will be the biggest seller so the majority of zen3 chips sold will be in whatever replaces the 3600.
You are basically explaining why 7nm+ isn't happening. AMD will be moving to 7nm+ to manufacture their new product lineups. Consoles need mature node with high production output - 7N/7NP
 
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Marlenus

Member
You are basically explaining why 7nm+ isn't happening. AMD will be moving to 7nm+ to manufacture their new product lineups. Consoles need mature node with high production output.

N7+ had the same yield as N7 after 2 quarters. Products built on N7+ are shipping to consumers and it is being used to manufacture mobile SoCs and will have plenty of capacity for consoles.

It is already a mature production ready node.
 

Hobbygaming

has been asked to post in 'Grounded' mode.
Prospero is the dev kit name. Gonzalo is the APU. Arden/ariel are GPU.
Yeah but what if Gonzalo and the others are from a scrapped or old design and Prospero has the real numbers? Also didn't Apisak say that AMD were posting incorrect information to throw people off?
 
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