This assumes the launch PS5 and the PS5 Pro SoCs would use the same process node, and they obviously won't.
The PS5 Pro will be N3 or N4, at least the CPU+GCD portion of it, if it's chiplet based.
The "butterfly arrangement" of the PS4 Pro was less than ideal. The chip had more pixel fillrate than its memory bandwidth could ever allow utilizing, i.e. a bunch of transistors / die area dedicated to ROPs that never got any utilization.
It was probably necessary because the earlier SDKs were made for close-to-metal optimizations and without any scaling options for more hardware resources.
I find it hard to believe the PS5 architecture and SDKs weren't designed for scalability from the start.
Also, if it's 30 WGPs then there's no room for more than 60 CUs.
Infinity Cache is also an option, especially if it uses MCDs. It's more believable than Sony going wider than 256bit RAM, which they've now adopted for almost 20 years in their home consoles.