Copying my post over from the SSD thread because I like 'em
SSD prices aren't that bad these days. they have improved yeah but i just paid £380 for a 2TB SSD. this is an NVME one...ykno the one that will be in next gen consoles. not a slow SATA3 drive which is cheaper. there is no way they are sticking in a 1TB or 2TB SSD. also these drives run hotter...
www.neogaf.com
Sometimes I think people forget large sequential transfers aren't all there are to SSD performance.
Some points that may be interesting:
Pappa Cerny: .
“The raw read speed is important,“ Cerny says, “but so are the details of the I/O [input-output] mechanisms and the software stack that we put on top of them. I got a PlayStation 4 Pro and then I put in a SSD that cost as much as the PlayStation 4 Pro—it might be one-third faster."
Again
: "Rather than treating games like a big block of data [on PS5], we're allowing finer-grained access to the data"
Oftentimes it's not a big 20GB transfer that's going to be hitting an SSD, it's the unpredictable accesses to smaller files that really choke their performance, you're probably not hitting your drives max sequential rate most of the time.
What else gets rid of block level access and reaps big IOPS gains?
On Software Defined Storage:
"Our measurements show that SDF can deliver approximately 95% of the raw flash bandwidth and provide 99% of the flash capacity for user data. SDF increases I/O bandwidth by 300% and reduces per-GB hardware cost by 50% on average compared with the commodity SSD-based system used at Baidu," reads a 2014 study.
Thought for food
2)
The beauty of what I mentioned is no hardware change, a normal-ish PCI-e 4.0 drive plus software defined storage getting rid of block level accesses = massive IOPS.
Though I think the SSD will be more special than that with all their research and patents into controller SRAM caches and all that.
<div p-id="p-0001">Disclosed herein is an information processing device including a host unit adapted to request data access by specifying a logical address of a secondary storage device, and a contro
www.freepatentsonline.com
- SRAM instead of DRAM inside the SSD for lower latency and higher throughput access between the flash memory controller and the address lookup data. The patent proposes using a coarser granularity of data access for data that is written once, and not re-written - e.g. game install data. This larger block size can allow for address lookup tables as small as 32KB, instead of 1GB. Data read by the memory controller can also be buffered in SRAM for ECC checks instead of DRAM (because of changes made further up the stack, described later). The patent also notes that by ditching DRAM, reduced complexity and cost may be possible, and cost will scale better with larger SSDs that would otherwise need e.g. 2GB of DRAM for 2TB of storage, and so on.
- The SSD's read unit is 'expanded and unified' for efficient read operations.
- A secondary CPU, a DMAC, and a hardware accelerator for decoding, tamper checking and decompression.
- The main CPU, the secondary CPU, the system memory controller and the IO bus are connected by a coherent bus. The patent notes that the secondary CPU can be different in instruction set etc. from the main CPU, as long as they use the same page size and are connected by a coherent bus.
- The hardware accelerator and the IO controller are connected to the IO bus.
If it ends up being all three parts of the triforce here...Holy hell.