It's in the above AT deep dive
Each full CPU, regardless of how many chiplets it has, is paired with a central IO die through Infinity Fabric links. The IO die acts as the central hub for all off-chip communications, as it houses all the PCIe lanes for the processor, as well as memory channels, and Infinity Fabric links to other chiplets or other CPUs. The IO die for the EPYC Rome processors is built on Global Foundries' 14nm process, however the consumer processor IO dies (which are smaller and contain fewer features) are built on the Global Foundries 12nm process.
Hm, the monolithic shot is curious indeed. It would be a limitation, you can have different fabrication nodes across chiplets but not chips, so either MS fronted the cost to port it to 7nm, or they were being artsy.
(I'm still lost as to where the idea that RT hardware was over infinity fabric came from)