Sony tackled the issue by sealing the die and the compound hermetically under the radiator. We've seen this on their patent, but couldn't interpret it earlier.
You can see on the pic that there's a seal around SOC chip with a tiny gap around.
Gap is for the thermal expansion of LM. If it was sealed flat, there would be constant pressure build-ups during heating up which might have lead to die degradation.
It's clearly visible on the patent, that this tiny gap creates a compartment around the SOC, and all conductive elements are sealed under and around it.
Providing the CPU has around 40W TDP and GPU can be estimated up to 140W, this is a really nice solution. I think that PS5 has to run cool, not for the sake of being quiet, but for the necessity of high clocks speed. OC 1.0.1 - to increase the clock you either push more voltage or lower the temps, usually both until you hit the wall.
Sony had to keep the temps low, to be able to hit 2.23 GHz without pushing more voltage. And it's very much connected to the SOC architecture approach they took (vide Mark's explanation on Road to PS5 presentation). The variable clock rates and the AMD smart shift are limiting clocks to a fixed power budget, but when you keep the temps at bay, the same power budget allows you to crank the clocks higher.
