Jaguar doesn't support native 256bits... it supports native 128bits.
Just like Zen 2 doesn't support native 512bits but it can be done with 2x256.
Native is a key word here.
Not to get hung up on, the CPU can as it has a 256-bit bus for example and thus can process a 256-bit data set and operand. IF they perform this with a dual cycle OR they choose to remove some of the instructions is all mute outside of console wars.
This console is not going to be encrypting SHA data algos, or compressing/Uncompressing on the CPU as they have dedicated block for this. The real focus is using the CPU for this type of work will affect the overall system frequency and be unproductive. If you are packing a huge amount of SIMD work in your game code, pack it up, shift to the GPU as compute job or in the future a GE job.
I see, thanks for taking time to reply.
More than welcome, and thanks for the questions, always good. I am not and have never been a font of all knowledge or to believe any appeals to authority. I love and thrive on conversation and discussion, god knows I have made enough mistakes over the years to learn a great deal, the only way.
You should just use the YouTube transcript feature lol, it's easier to quote people.
He says.. "or are they?" coyly suggesting that the architecture enables less than moderate usage.
Sure, thanks for the correction. All AVX is 256 bit.. including AVX1... but all 256 bit instructions on X86 are AVX.
I'm still confused why you think a Zen2 based CPU would not support the full AVX2 instruction set.. that was supported by Zen+ before it.. and Zen before that..
I want to stress I do not know what the have chosen to do, but we all know that Mark and the entire Engineering team along with the wealth of information from the software studios will know what is and is not needed.
All I am saying is that a Zen based Desktop needs to support a much wider and richer set of OPS and data that covers is eventual use, Desktop, Server, Web Farms, Databases etc etc. A console has a finite level of functions it can and will perform PLUS it has a closed environment and development path that is controlled and guided by Sony. As such when cost cutting and or custom changes are made they are always a trade off and dropping the expense of an array of AVX2 OPS seems like a fair sacrifice when you have such a powerful APU with hUMA based memory set-up.